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公开(公告)号:US11855153B2
公开(公告)日:2023-12-26
申请号:US17245766
申请日:2021-04-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Chia-Yang Hung , Sheng-Liang Pan
IPC: H01L29/40 , H01L21/768 , H01L21/311 , H01L23/532 , H01L23/522 , H01L29/45 , H01L21/3215 , H01L29/417
CPC classification number: H01L29/401 , H01L21/31122 , H01L21/76805 , H01L21/76859 , H01L21/76877 , H01L21/3215 , H01L21/76831 , H01L21/76844 , H01L23/5226 , H01L23/53257 , H01L29/41791 , H01L29/456
Abstract: A semiconductor device and method of manufacture are provided which utilize a remote plasma process which reduces or eliminates segregation of material. By reducing segregation of the material, overlying conductive material can be deposited on a smoother interface. By depositing on smoother interfaces, overall losses of the deposited material may be avoided, which improves the overall yield.
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公开(公告)号:US20240395536A1
公开(公告)日:2024-11-28
申请号:US18790002
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Yang Hung , Huan-Just Lin , Sheng-Liang Pan , Yungtzu Chen , Po-Chuan Wang , Guan-Xuan Chen
IPC: H01L21/02 , H01L21/8234
Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first opening through a dielectric layer, the first opening exposing a conductive region. A wet cleaning is used after the forming the first opening, and the first opening is treated after the wet cleaning the first opening, the treating the first opening comprising turning a sidewall treatment precursor and a bottom treatment precursor into a first plasma mixture, the sidewall treatment precursor being different from the bottom treatment precursor. The first opening is filled with a conductive material after the treating the first opening.
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公开(公告)号:US12154784B2
公开(公告)日:2024-11-26
申请号:US17720033
申请日:2022-04-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Yang Hung , Huan-Just Lin , Sheng-Liang Pan , Yungtzu Chen , Po-Chuan Wang , Guan-Xuan Chen
IPC: H01L21/02 , H01L21/8234
Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first opening through a dielectric layer, the first opening exposing a conductive region. A wet cleaning is used after the forming the first opening, and the first opening is treated after the wet cleaning the first opening, the treating the first opening comprising turning a sidewall treatment precursor and a bottom treatment precursor into a first plasma mixture, the sidewall treatment precursor being different from the bottom treatment precursor. The first opening is filled with a conductive material after the treating the first opening.
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公开(公告)号:US12205816B2
公开(公告)日:2025-01-21
申请号:US17232465
申请日:2021-04-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Guan-Xuan Chen , Chia-Yang Hung , Sheng-Liang Pan , Huan-Just Lin
IPC: H01L21/02 , H01L21/311 , H01L21/768
Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.
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公开(公告)号:US20230268223A1
公开(公告)日:2023-08-24
申请号:US17652398
申请日:2022-02-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Guan-Xuan Chen , Chia-Yang Hung , Sheng-Liang Pan , Huan-Just Lin
IPC: H01L21/768 , H01L23/535 , H01L23/532 , H01L21/02
CPC classification number: H01L21/76814 , H01L21/02063 , H01L21/76805 , H01L21/76829 , H01L21/76895 , H01L23/53257 , H01L23/535
Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a gate electrode, a gate electrode contact layer over the gate electrode, forming a dielectric layer over the gate electrode contact layer, and performing an etch through the dielectric layer, the etch forming an opening that exposes the gate electrode contact layer. The method further includes performing a post-etch treatment on the opening formed by the etch process by exposing the opening to a plasma. The method further includes forming gate electrode contacts in the openings after the post-etch treatment by a bottom-up deposition process.
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公开(公告)号:US20230178361A1
公开(公告)日:2023-06-08
申请号:US17720033
申请日:2022-04-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Yang Hung , Huan-Just Lin , Sheng-Liang Pan , Yungtzu Chen , Po-Chuan Wang , Guan-Xuan Chen
IPC: H01L21/02 , H01L21/8234
CPC classification number: H01L21/02052 , H01L21/02315 , H01L21/823418 , H01L21/823431
Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first opening through a dielectric layer, the opening exposing a conductive region. A wet cleaning is used after the forming the first opening, and the first opening is treated after the wet cleaning the first opening, the treating the first opening comprising turning a sidewall treatment precursor and a bottom treatment precursor into a first plasma mixture, the sidewall treatment precursor being different from the bottom treatment precursor. The first opening is filled with a conductive material after the treating the first opening.
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公开(公告)号:US20220102138A1
公开(公告)日:2022-03-31
申请号:US17232465
申请日:2021-04-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Guan-Xuan Chen , Chia-Yang Hung , Sheng-Liang Pan , Huan-Just Lin
IPC: H01L21/02 , H01L21/311 , H01L21/768
Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.
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公开(公告)号:US12293910B2
公开(公告)日:2025-05-06
申请号:US18359552
申请日:2023-07-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Guan-Xuan Chen , Chia-Yang Hung , Sheng-Liang Pan , Huan-Just Lin
IPC: H01L21/02 , H01L21/311 , H01L21/768
Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.
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公开(公告)号:US20240387517A1
公开(公告)日:2024-11-21
申请号:US18786525
申请日:2024-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Guan-Xuan Chen , Chia-Yang Hung , Sheng-Liang Pan , Huan-Just Lin
IPC: H01L27/06 , H01L21/265 , H01L29/66 , H01L29/78
Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a gate electrode, a gate electrode contact layer over the gate electrode, forming a dielectric layer over the gate electrode contact layer, and performing an etch through the dielectric layer, the etch forming an opening that exposes the gate electrode contact layer. The method further includes performing a post-etch treatment on the opening formed by the etch process by exposing the opening to a plasma. The method further includes forming gate electrode contacts in the openings after the post-etch treatment by a bottom-up deposition process.
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公开(公告)号:US20230387222A1
公开(公告)日:2023-11-30
申请号:US18447212
申请日:2023-08-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Chuan Wang , Chia-Yang Hung , Sheng-Liang Pan
IPC: H01L29/40 , H01L21/768 , H01L21/311
CPC classification number: H01L29/401 , H01L21/76805 , H01L21/31122 , H01L21/76877 , H01L21/76859 , H01L23/53257
Abstract: A semiconductor device and method of manufacture are provided which utilize a remote plasma process which reduces or eliminates segregation of material. By reducing segregation of the material, overlying conductive material can be deposited on a smoother interface. By depositing on smoother interfaces, overall losses of the deposited material may be avoided, which improves the overall yield.
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