公开(公告)号：US11094554B2

公开(公告)日：2021-08-17

申请号：US15475280

申请日：2017-03-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Ho Lin ,  Jen-Chieh Lai ,  Jheng-Si Su ,  Zhi-Sheng Hsu ,  Po-Ting Huang

IPC: H01L21/321 ,  H01L21/28 ,  B24B37/04 ,  B24B53/017

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a wafer over a polishing platen. The wafer includes a metal layer and a dielectric layer. The metal layer covers the dielectric layer and fills an opening of the dielectric layer. The method also includes polishing the wafer using a first operation to thin down the metal layer. The first operation has a first polishing selectivity of the metal layer to the dielectric layer. The method further includes polishing the wafer using a second operation to further thin down the metal layer until the dielectric layer is exposed. The second operation has a second polishing selectivity of the metal layer to the dielectric layer. The second polishing selectivity is different from the first polishing selectivity. The first operation and the second operation are performed in-situ on the polishing platen.