公开(公告)号：US11251100B2

公开(公告)日：2022-02-15

申请号：US16877508

申请日：2020-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-An Kuo ,  Ching-Jung Yang ,  Hsien-Wei Chen ,  Jie Chen ,  Ming-Fa Chen

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor structure including a first semiconductor die, a second semiconductor die, a passivation layer, an anti-arcing pattern, and conductive terminals is provided. The second semiconductor die is stacked over the first semiconductor die. The passivation layer covers the second semiconductor die and includes first openings for revealing pads of the second semiconductor die. The anti-arcing pattern is disposed over the passivation layer. The conductive terminals are disposed over and electrically connected to the pads of the second semiconductor die.

公开(公告)号：US20210090966A1

公开(公告)日：2021-03-25

申请号：US16877508

申请日：2020-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-An Kuo ,  Ching-Jung Yang ,  Hsien-Wei Chen ,  Jie Chen ,  Ming-Fa Chen

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor structure including a first semiconductor die, a second semiconductor die, a passivation layer, an anti-arcing pattern, and conductive terminals is provided. The second semiconductor die is stacked over the first semiconductor die. The passivation layer covers the second semiconductor die and includes first openings for revealing pads of the second semiconductor die. The anti-arcing pattern is disposed over the passivation layer. The conductive terminals are disposed over and electrically connected to the pads of the second semiconductor die.