公开(公告)号：US20240021469A1

公开(公告)日：2024-01-18

申请号：US18356843

申请日：2023-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Chiang Weng ,  Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L21/768 ,  H01L25/065 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L23/48 ,  H01L21/311

CPC classification number: H01L21/76832 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L21/76805 ,  H01L25/0657 ,  H01L21/76807 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/481 ,  H01L21/31116

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

公开(公告)号：US11791205B2

公开(公告)日：2023-10-17

申请号：US17238496

申请日：2021-04-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Chiang Weng ,  Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L25/065 ,  H01L23/522 ,  H01L21/768 ,  H01L23/31 ,  H01L23/528 ,  H01L23/48 ,  H01L21/311

CPC classification number: H01L21/76832 ,  H01L21/31116 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5283 ,  H01L25/0657

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

公开(公告)号：US12243772B2

公开(公告)日：2025-03-04

申请号：US18356843

申请日：2023-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Chiang Weng ,  Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L23/522 ,  H01L21/311 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/528 ,  H01L25/065

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

公开(公告)号：US20210242080A1

公开(公告)日：2021-08-05

申请号：US17238496

申请日：2021-04-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Chiang Weng ,  Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L21/768 ,  H01L25/065 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L23/48 ,  H01L21/311

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

公开(公告)号：US09893107B2

公开(公告)日：2018-02-13

申请号：US14857657

申请日：2015-09-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu Wei ,  Hsin-Chi Chen ,  Ssu-Chiang Weng ,  Yung-Lung Hsu ,  Yen-Liang Lin ,  Chin-Hsun Hsiao

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14689

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a light sensing feature, a negative oxide layer, a gate dielectric layer and a transfer gate. The light sensing feature is configured in the substrate to detect an incoming radiation. The negative oxide layer is over the light sensing feature. The gate dielectric layer is over the negative oxide layer. The transfer gate is over the gate dielectric layer.