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公开(公告)号:US20210200092A1
公开(公告)日:2021-07-01
申请号:US17098238
申请日:2020-11-13
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Chung SU , Tsung-Han KO , Ching-Yu CHANG
Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate. The protective layer and the photoresist layer are selectively exposed to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer. The protective layer includes a polymer without a nitrogen-containing moiety, and a basic quencher, an organic acid, a photoacid generator, or a thermal acid generator.
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公开(公告)号:US20220285492A1
公开(公告)日:2022-09-08
申请号:US17192134
申请日:2021-03-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ting-Ting CHEN , Chen-Han WANG , Keng-Chu LIN , Shuen-Shin LIANG , Tsu-Hsiu PERNG , Tsai-Jung HO , Tsung-Han KO , Tetsuji UENO , Yahru CHENG
IPC: H01L29/06 , H01L29/66 , H01L21/8234
Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.
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公开(公告)号:US20200135452A1
公开(公告)日:2020-04-30
申请号:US16731664
申请日:2019-12-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Tsung-Han KO , Joy CHENG , Ching-Yu CHANG , Chin-Hsiang LIN
IPC: H01L21/027 , H01L21/033 , H01L21/308 , H01L21/266 , G03F7/038 , G03F7/20 , G03F7/40 , G03F7/09 , G03F7/039 , G03F7/38 , G03F7/26
Abstract: A method for performing a photolithography process is provided. The method includes forming a layer over a substrate, and exposing a portion of the layer to form an exposed region. The method also includes performing a baking process on the layer, so that voids are formed in the exposed region of the layer. The method further includes filling the void with a post treatment coating material, and the post treatment coating material is over the exposed region of the layer.
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公开(公告)号:US20190080901A1
公开(公告)日:2019-03-14
申请号:US15906187
申请日:2018-02-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tsung-Han KO , Joy CHENG , Ching-Yu CHANG , Chin-Hsiang LIN
IPC: H01L21/027 , H01L21/033 , H01L21/308 , H01L21/266 , G03F7/38 , G03F7/20 , G03F7/40 , G03F7/09 , G03F7/039 , G03F7/038
Abstract: A method for performing a photolithography process is provided. The method includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed region and an unexposed region by performing an exposure process. The method includes performing a baking process on the resist layer, so that voids are formed in the exposed region of the resist layer. The method also includes removing the unexposed region of the resist layer to form a recess in the resist layer and filling a post treatment coating material in the recess and the void. The method further includes removing a portion of the post treatment coating material by performing a second develop process, and another portion of the post treatment coating material is left on surfaces of the exposed region of the resist layer to form a patterned resist layer.
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