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公开(公告)号:US20210302833A1
公开(公告)日:2021-09-30
申请号:US17071004
申请日:2020-10-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Ming-Hui WENG , Chen-Yu LIU , Chih-Cheng LIU , Yi-Chen KUO , Jia-Lin WEI , Yen-Yu CHEN , Jr-Hung LI , Yahru CHENG , Chi-Ming YANG , Tze-Liang LEE , Ching-Yu CHANG
IPC: G03F7/004 , G03F7/00 , H01L21/033
Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
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公开(公告)号:US20230012705A1
公开(公告)日:2023-01-19
申请号:US17581671
申请日:2022-01-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: An-Ren ZI , Yahru CHENG , Ching-Yu CHANG , Chin-Hsiang LIN
IPC: H01L21/027 , H01L21/308
Abstract: A method for forming a semiconductor device is provided. The method includes applying a photoresist composition over a substrate, thereby forming a photoresist layer over the substrate; performing a first baking process to the photoresist layer; exposing the photoresist layer to an extreme ultraviolet (EUV) radiation, thereby forming a pattern therein; performing a second baking process to the photoresist layer; and developing the photoresist layer having the pattern therein using a developer, thereby forming a patterned photoresist layer. The first baking process and the second baking process are conducted under an ambient atmosphere having a humidity level ranging from 55% to 100%.
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公开(公告)号:US20220285492A1
公开(公告)日:2022-09-08
申请号:US17192134
申请日:2021-03-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ting-Ting CHEN , Chen-Han WANG , Keng-Chu LIN , Shuen-Shin LIANG , Tsu-Hsiu PERNG , Tsai-Jung HO , Tsung-Han KO , Tetsuji UENO , Yahru CHENG
IPC: H01L29/06 , H01L29/66 , H01L21/8234
Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.
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公开(公告)号:US20210305047A1
公开(公告)日:2021-09-30
申请号:US17150356
申请日:2021-01-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Jia-Lin WEI , Ming-Hui WENG , Chih-Cheng LIU , Yi-Chen KUO , Yen-Yu CHEN , Yahru CHENG , Jr-Hung LI , Ching-Yu CHANG , Tze-Liang LEE , Chi-Ming YANG
IPC: H01L21/033 , H01L21/308 , G03F1/22 , G03F7/20
Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.
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公开(公告)号:US20210366711A1
公开(公告)日:2021-11-25
申请号:US17226872
申请日:2021-04-09
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: An-Ren ZI , Chun-Chih HO , Yahru CHENG , Ching-Yu CHANG
IPC: H01L21/033 , H01L21/308 , G03F7/20
Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.
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公开(公告)号:US20210302839A1
公开(公告)日:2021-09-30
申请号:US17150389
申请日:2021-01-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chih-Cheng LIU , Yi-Chen KUO , Jia-Lin WEI , Ming-Hui WENG , Yen-Yu CHEN , Jr-Hung LI , Yahru CHENG , Chi-Ming YANG , Tze-Liang LEE , Ching-Yu CHANG
IPC: G03F7/16 , G03F7/11 , H01L21/027
Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1≤a≤2, b≥1, c≥1, and b+c≤5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.
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公开(公告)号:US20240387188A1
公开(公告)日:2024-11-21
申请号:US18789319
申请日:2024-07-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Fong TSAI , Ya-Lun CHEN , Tsai-Yu HUANG , Yahru CHENG , Huicheng CHANG , Yee-Chia YEO
IPC: H01L21/3105 , G03F7/16 , H01L21/027 , H01L21/311
Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.
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公开(公告)号:US20230386852A1
公开(公告)日:2023-11-30
申请号:US18446416
申请日:2023-08-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Fong TSAI , Ya-Lun CHEN , Tsai-Yu HUANG , Yahru CHENG , Huicheng CHANG , Yee-Chia YEO
IPC: H01L21/3105 , G03F7/16 , H01L21/027 , H01L21/311
CPC classification number: H01L21/31058 , G03F7/168 , G03F7/162 , H01L21/0276 , H01L21/31144
Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.
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公开(公告)号:US20230377883A1
公开(公告)日:2023-11-23
申请号:US17750148
申请日:2022-05-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Ling CHANG CHIEN , Yu-Chung SU , Yahru CHENG , Ching-Yu CHANG , Chin-Hsiang LIN
IPC: H01L21/027
CPC classification number: H01L21/0271
Abstract: A system and method utilize directed self-assembly films, including block copolymers and solvents, to form features on a wafer. The solvents have high boiling points. The high boiling points of the solvents enable directed self-assembly processes to utilize very high temperature, rapid thermal annealing processes to generate a pattern of first and second polymer structures over a wafer from the directed self-assembly films. The pattern of the first and second polymer structures can be utilized to form the features on the wafer.
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公开(公告)号:US20220028684A1
公开(公告)日:2022-01-27
申请号:US17156365
申请日:2021-01-22
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yen-Yu CHEN , Chib-Cheng LIU , Yi-Ohen KUO , Jr-Hung Li , Tze-Liang LEE , Ming-Hui WENG , Yahru CHENG
IPC: H01L21/027 , H01L21/311 , H01L21/308
Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.
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