公开(公告)号：US20240274662A1

公开(公告)日：2024-08-15

申请号：US18168968

申请日：2023-02-14

Applicant: Taiwan Semiconductor Manufacturing Co, Ltd.

Inventor： Tzu-Ging LIN

IPC: H01L29/06 ,  H01L21/3065 ,  H01L21/762 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L21/3065 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming first and second nanostructured layers on first and second fin bases, forming cladding layers on sidewalls of the first and second nanostructured layers, forming a polysilicon structure on the first and second nanostructured layers, removing a portion of the polysilicon structure to form a first opening on the second nanostructured layers, removing a portion of the second nanostructured layers through the first opening to form a second opening on the second fin base, removing a portion of the second fin base through the second opening to form a third opening on the substrate, removing a portion of the substrate through the third opening to form a fourth opening in the substrate, and depositing an insulation material to fill the first, second, third, and fourth openings.

公开(公告)号：US20230395654A1

公开(公告)日：2023-12-07

申请号：US17832495

申请日：2022-06-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tzu-Ging LIN ,  Chen-Yu Tai

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/762 ,  H01L29/66

CPC classification number: H01L29/0649 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/76224 ,  H01L29/66545 ,  H01L29/66742

Abstract: The present disclosure describes a structure that provides insulation in a semiconductor device and a method for forming the structure. The structure includes a first isolation structure including a first isolation layer disposed on a substrate, a second isolation layer disposed on the first isolation layer, and a first high-k dielectric layer having a first height and disposed on the second isolation layer. The structure further includes a second isolation structure including a third isolation layer disposed on the substrate, a fourth isolation layer disposed on the third isolation layer, and a second high-k dielectric layer having a second height and disposed on the fourth isolation layer, where the second height is less than the first height. The structure further includes a gate structure disposed on the first isolation structure, and an insulating structure disposed adjacent to the gate structure and on the second isolation structure.