公开(公告)号：US20240379803A1

公开(公告)日：2024-11-14

申请号：US18784535

申请日：2024-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei Ju LEE ,  Zhi-Chang LIN ,  Chun-Fu CHENG ,  Chung-Wei WU ,  Zhiqiang WU

IPC: H01L29/423 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/786

Abstract: A device includes a substrate, a first semiconductor channel over the substrate, and a second semiconductor channel over the substrate and laterally separated from the first semiconductor channel. A gate structure covers and wraps around the first semiconductor channel and the second semiconductor channel. A first source/drain region abuts the first semiconductor channel on a first side of the gate structure, and a second source/drain region abuts the second semiconductor channel on the first side of the gate structure. An isolation structure is under and between the first source/drain region and the second source/drain region, and includes a first isolation region in contact with bottom surfaces of the first and second source/drain regions, and a second isolation region in contact with sidewalls of the first and second source/drain regions, and extending from a bottom surface of the first isolation region to upper surfaces of the first and second source/drain regions.

公开(公告)号：US20220336613A1

公开(公告)日：2022-10-20

申请号：US17564125

申请日：2021-12-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei Ju LEE ,  Zhi-Chang LIN ,  Chun-Fu CHENG ,  Chung-Wei WU ,  Zhiqiang WU

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L21/8234

Abstract: A device includes a substrate, a first semiconductor channel over the substrate, and a second semiconductor channel over the substrate and laterally separated from the first semiconductor channel. A gate structure covers and wraps around the first semiconductor channel and the second semiconductor channel. A first source/drain region abuts the first semiconductor channel on a first side of the gate structure, and a second source/drain region abuts the second semiconductor channel on the first side of the gate structure. An isolation structure is under and between the first source/drain region and the second source/drain region, and includes a first isolation region in contact with bottom surfaces of the first and second source/drain regions, and a second isolation region in contact with sidewalls of the first and second source/drain regions, and extending from a bottom surface of the first isolation region to upper surfaces of the first and second source/drain regions.

公开(公告)号：US20220246522A1

公开(公告)日：2022-08-04

申请号：US17723116

申请日：2022-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Bo Liao ,  Wei Ju LEE ,  Cheng-Ting CHUNG ,  Hou-Yu CHEN ,  Chun-Fu CHENG ,  Kuan-Lun CHENG

IPC: H01L23/522 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/78

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and a conductive rail structure between the first and second vertical structures. A top surface of the conductive rail structure can be substantially coplanar with top surfaces of the first and the second vertical structures.