公开(公告)号：US10276378B1

公开(公告)日：2019-04-30

申请号：US15797873

申请日：2017-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ying-Hao Wu ,  Chao-Kuei Yeh ,  Tai-Yen Peng ,  Yun-Yu Chen ,  Jiann-Horng Lin ,  Chih-Hao Chen

IPC: H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L21/768

Abstract: A method of forming a semiconductor device structure is provided. The method includes successively forming first and second hard mask layers over a trench pattern region of a material layer. The second hard mask layer has a first tapered opening corresponding to a portion of the trench pattern region and a passivation spacer is formed on a sidewall of the first tapered opening to form a second tapered opening therein. The method also includes forming a third tapered opening below the second tapered opening and removing a portion of the passivation spacer in a first etching process. The method also includes forming a vertical opening in the first hard mask layer below the bottom of the third tapered opening in a second etching process. The vertical opening has a width that is substantially equal to a bottom width of the third tapered opening.