公开(公告)号：US12132004B2

公开(公告)日：2024-10-29

申请号：US17818797

申请日：2022-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2225/0651 ,  H01L2225/1035 ,  H01L2225/1058

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.

公开(公告)号：US12100640B2

公开(公告)日：2024-09-24

申请号：US18328387

申请日：2023-06-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Hung-Yu Chen ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/04 ,  H01L23/31 ,  H01L23/40

CPC classification number: H01L23/3737 ,  H01L21/4882 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/4006 ,  H01L2023/4087

Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

公开(公告)号：US20230253321A1

公开(公告)日：2023-08-10

申请号：US18302182

申请日：2023-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chih Huang ,  Li-An Sun ,  Che-En Tsai ,  Yu-Lin Chiang ,  Chung Chuan Huang ,  Chih-Hao Chen

IPC: H01L23/528 ,  H01L23/535 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01L23/535 ,  H01L21/76895 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76805

Abstract: A method includes forming a first etch stop layer (ESL) over a conductive feature, forming a first dielectric layer on the first ESL, forming a second ESL on the first dielectric layer, forming a second dielectric layer on the second ESL, forming a trench in the second dielectric layer, forming a first opening in a bottom surface of the trench extending through the second dielectric layer, and forming a second opening in a bottom surface of the first opening. The second opening extends through the first dielectric layer and the first ESL. The second opening exposes a top surface of the conductive feature. The method further includes widening the first opening to a second width, filling the trench with a conductive material to form a conductive line, and filling the second opening and the first opening with the conductive material to form a conductive via.

公开(公告)号：US11652049B2

公开(公告)日：2023-05-16

申请号：US17318327

申请日：2021-05-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chih Huang ,  Li-An Sun ,  Che-En Tsai ,  Yu-Lin Chiang ,  Chung Chuan Huang ,  Chih-Hao Chen

IPC: H01L23/528 ,  H01L23/535 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/535

Abstract: A method includes forming a first etch stop layer (ESL) over a conductive feature, forming a first dielectric layer on the first ESL, forming a second ESL on the first dielectric layer, forming a second dielectric layer on the second ESL, forming a trench in the second dielectric layer, forming a first opening in a bottom surface of the trench extending through the second dielectric layer, and forming a second opening in a bottom surface of the first opening. The second opening extends through the first dielectric layer and the first ESL. The second opening exposes a top surface of the conductive feature. The method further includes widening the first opening to a second width, filling the trench with a conductive material to form a conductive line, and filling the second opening and the first opening with the conductive material to form a conductive via.

公开(公告)号：US20220122922A1

公开(公告)日：2022-04-21

申请号：US17150300

申请日：2021-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.

公开(公告)号：US20200271860A1

公开(公告)日：2020-08-27

申请号：US16285234

申请日：2019-02-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Chin-Fu Kao ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: G02B6/12 ,  G02B6/30 ,  G02B6/122 ,  G02B6/43

Abstract: A semiconductor package includes a photonic integrated circuit, an encapsulating material, and a redistribution structure. The photonic integrated circuit includes a coupling surface, a back surface opposite to the coupling surface and a plurality of optical couplers disposed on the coupling surface and configured to be coupled to a plurality of optical fibers. The encapsulating material encapsulates the photonic integrated circuit and revealing the plurality of optical couplers. The redistribution structure is disposed over the encapsulating material and the back surface of the photonic integrated circuit, wherein the redistribution structure is electrically connected to the photonic integrated circuit.

公开(公告)号：US11705381B2

公开(公告)日：2023-07-18

申请号：US17375304

申请日：2021-07-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Hung-Yu Chen ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/04 ,  H01L23/40 ,  H01L21/48

CPC classification number: H01L23/3737 ,  H01L21/4882 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/4006 ,  H01L2023/4087

Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

公开(公告)号：US20230014913A1

公开(公告)日：2023-01-19

申请号：US17686856

申请日：2022-03-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Po-Yuan Cheng ,  Pu Wang ,  Li-Hui Cheng

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48

Abstract: In an embodiment, a device includes: a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component, the integrated circuit die exposed at a back-side of the package component; a heat dissipation layer on the back-side of the package component and on sidewalls of the package component; an adhesive layer on a back-side of the heat dissipation layer, a portion of a sidewall of the heat dissipation layer being free from the adhesive layer; and a package substrate connected to the conductive connectors.

公开(公告)号：US20220392823A1

公开(公告)日：2022-12-08

申请号：US17375304

申请日：2021-07-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Hung-Yu Chen ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/04 ,  H01L23/40 ,  H01L21/48

Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

公开(公告)号：US11239136B1

公开(公告)日：2022-02-01

申请号：US16941509

申请日：2020-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Chin-Fu Kao ,  Li-Hui Cheng ,  Szu-Wei Lu ,  Chih-Chien Pan

IPC: H01L23/34 ,  H01L23/48 ,  H01L23/28 ,  H01L21/00 ,  H05K7/20 ,  H01L23/42 ,  H01L27/06 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L25/065 ,  H01L23/498

Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die. The TIM is disposed on the first die, the second die, and the underfill layer. The adhesive pattern is disposed between the underfill layer and the TIM to separate the underfill layer from the TIM.