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    Photolithography scattering bar structure and method
    3.
    发明授权
    Photolithography scattering bar structure and method 有权
    光刻散射棒结构及方法

    公开(公告)号：US09213233B2

    公开(公告)日：2015-12-15

    申请号：US13941164

    申请日：2013-07-12

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chia-Cheng Chang ,  Wei-Kuan Yu ,  Yen-Hsu Chu ,  Tsai-Ming Huang ,  Chin-Min Huang ,  Cherng-Shyan Tsay ,  Chien Wen Lai ,  Hua-Tai Lin

    IPC分类号： G03F1/38 ,  G03F7/20

    CPC分类号： G03F1/38 ,  G03F1/36 ,  G03F7/20 ,  G03F7/70283 ,  G03F7/70441

    摘要： Provided is an integrated circuit (IC) photo mask. The IC photo mask includes a main feature of the IC, the main feature having a plurality of sides, and a plurality of assist features, the assist features being spaced from each other and spaced from the main feature, wherein each one of the assist features is adjacent to one of the sides, each one of the assist features has an elongated shape along a direction, whereby extending the shape in the direction would intersect at least another one of the assist features and the assist features are sub-resolution correction features for correcting for optical proximity effect in a photolithography process.

    摘要翻译： 提供了一种集成电路（IC）光掩模。 IC照片掩模包括IC的主要特征，主要特征具有多个侧面，以及多个辅助特征，辅助特征彼此间隔开并且与主要特征间隔开，其中每个辅助特征 辅助特征中的每一个相邻于一个侧面，每个辅助特征沿着一个方向具有细长形状，由此沿该方向延伸的形状将与辅助特征和辅助特征中的至少另一个相交，具有子分辨率校正特征，用于 在光刻工艺中校正光学邻近效应。

    Method and apparatus for integrated circuit mask patterning
    4.
    发明授权
    Method and apparatus for integrated circuit mask patterning 有权

    公开(公告)号：US10990744B2

    公开(公告)日：2021-04-27

    申请号：US15868113

    申请日：2018-01-11

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chin-Min Huang ,  Bo-Han Chen ,  Cherng-Shyan Tsay ,  Chien Wen Lai ,  Hua-Tai Lin ,  Chia-Cheng Chang ,  Lun-Wen Yeh ,  Shun-Shing Yang

    IPC分类号： G06F30/398 ,  G03F1/36 ,  G03F1/70

    摘要： Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.

    PHOTOLITHOGRPAHY SCATTERING BAR STRUCTURE AND METHOD
    6.
    发明申请
    PHOTOLITHOGRPAHY SCATTERING BAR STRUCTURE AND METHOD 有权
    光电散射棒结构与方法

    公开(公告)号：US20150017571A1

    公开(公告)日：2015-01-15

    申请号：US13941164

    申请日：2013-07-12

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chia-Cheng CHANG ,  Wei-Kuan Yu ,  Yen-Hsu Chu ,  Tsai-Ming Huang ,  Chin-Min Huang ,  Cherng-Shyan Tsay ,  Chien Wen Lai ,  Hua-Tai Lin

    IPC分类号： G03F1/38 ,  G03F7/20

    CPC分类号： G03F1/38 ,  G03F1/36 ,  G03F7/20 ,  G03F7/70283 ,  G03F7/70441

    摘要： Provided is an integrated circuit (IC) photo mask. The IC photo mask includes a main feature of the IC, the main feature having a plurality of sides, and a plurality of assist features, the assist features being spaced from each other and spaced from the main feature, wherein each one of the assist features is adjacent to one of the sides, each one of the assist features has an elongated shape along a direction, whereby extending the shape in the direction would intersect at least another one of the assist features and the assist features are sub-resolution correction features for correcting for optical proximity effect in a photolithography process.

    摘要翻译： 提供了一种集成电路（IC）光掩模。 IC照片掩模包括IC的主要特征，主要特征具有多个侧面，以及多个辅助特征，辅助特征彼此间隔开并且与主要特征间隔开，其中每个辅助特征 辅助特征中的每一个相邻于一个侧面，每个辅助特征沿着一个方向具有细长形状，由此沿该方向延伸的形状将与辅助特征和辅助特征中的至少另一个相交，具有子分辨率校正特征，用于 在光刻工艺中校正光学邻近效应。

    Method and Apparatus for Integrated Circuit Mask Patterning
    8.
    发明申请
    Method and Apparatus for Integrated Circuit Mask Patterning 有权

    公开(公告)号：US20210240907A1

    公开(公告)日：2021-08-05

    申请号：US17236832

    申请日：2021-04-21

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chin-Min Huang ,  Bo-Han Chen ,  Cherng-Shyan Tsay ,  Chien-Wen Lai ,  Hua-Tai Lin ,  Chia-Cheng Chang ,  Lun-Wen Yeh ,  Shun-Shing Yang

    IPC分类号： G06F30/398 ,  G03F1/36 ,  G03F1/70

    摘要： Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.