Vertex-based OPC for opening patterning

    公开(公告)号:US11675962B2

    公开(公告)日:2023-06-13

    申请号:US17712974

    申请日:2022-04-04

    发明人: Shinn-Sheng Yu

    摘要: A method of enhancing a layout pattern includes determining a target layout pattern comprising a disk shape associated with a hole. The method includes defining a polygon having a plurality of vertices on the disk shape. The plurality of vertices coincide with a boundary of the disk shape and the polygon is an initial layout pattern of the hole. The method includes performing an iterative correction of the initial layout pattern. The iterative correction includes projecting the layout pattern of the hole onto a substrate, determining an error between the target layout pattern and the projected layout pattern, and adjusting the layout pattern by moving the vertices of the polygon to generate a next iteration of the layout pattern. The method includes continuing the adjusting, projecting, and determining until a criterion is satisfied and a final iteration of the layout pattern of the hole is generated.

    Pellicle for EUV mask and fabrication thereof

    公开(公告)号:US10831094B2

    公开(公告)日:2020-11-10

    申请号:US16657737

    申请日:2019-10-18

    IPC分类号: G03F1/62

    摘要: The present disclosure provides a method in accordance with some embodiments. A wafer is grinded from a back side. The wafer is inserted into an opening defined by a frame holder. The frame holder is attached to a carrier through a temporary layer. A front side of the wafer is attached to the temporary layer. Thereafter, the wafer is etched from the back side until the wafer reaches a predetermined thickness. Thereafter, the frame holder and the wafer therein are separated from the temporary layer and the carrier.

    Pellicle for EUV Mask and Fabrication Thereof

    公开(公告)号:US20200050100A1

    公开(公告)日:2020-02-13

    申请号:US16657737

    申请日:2019-10-18

    IPC分类号: G03F1/62

    摘要: The present disclosure provides a method in accordance with some embodiments. A wafer is grinded from a back side. The wafer is inserted into an opening defined by a frame holder. The frame holder is attached to a carrier through a temporary layer. A front side of the wafer is attached to the temporary layer. Thereafter, the wafer is etched from the back side until the wafer reaches a predetermined thickness. Thereafter, the frame holder and the wafer therein are separated from the temporary layer and the carrier.

    Method for integrated circuit patterning

    公开(公告)号:US10276372B2

    公开(公告)日:2019-04-30

    申请号:US15672908

    申请日:2017-08-09

    IPC分类号: H01L21/027 G03F7/40

    摘要: A method includes patterning a resist layer formed over a substrate, resulting in a resist pattern; and transferring the resist pattern to an anti-reflection coating (ARC) layer formed under the resist layer and over the substrate, resulting in a patterned ARC layer. The method further includes treating the patterned ARC layer with an ion beam, resulting in a treated patterned ARC layer, wherein the ion beam is generated with a first gas and is directed towards the patterned ARC layer at a tilt angle at least 10 degrees. The method further includes etching the substrate with the treated patterned ARC layer as an etch mask.

    Extreme ultraviolet lithography process and mask
    7.
    发明授权
    Extreme ultraviolet lithography process and mask 有权
    极紫外光刻工艺和面膜

    公开(公告)号:US09529249B2

    公开(公告)日:2016-12-27

    申请号:US14331974

    申请日:2014-07-15

    摘要: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having reflective phase-shift-grating-blocks (PhSGBs). The system also includes an illumination to expose the mask to produce a resultant reflected light from the mask. The resultant reflected light contains mainly diffracted lights. The system also has projection optics to collect and direct resultant reflected light to expose a target.

    摘要翻译: 公开了一种极紫外光刻(EUVL)系统。 该系统包括具有反射相移光栅块(PhSGB)的掩模。 该系统还包括用于暴露掩模以产生从掩模产生的反射光的照明。 所产生的反射光主要包含衍射光。 该系统还具有投影光学器件,用于收集和引导所产生的反射光以暴露目标物。

    Lithography Method and Structure for Resolution Enhancement with a Two-State Mask
    8.
    发明申请
    Lithography Method and Structure for Resolution Enhancement with a Two-State Mask 有权
    使用双态掩模的分辨率增强的平版印刷方法和结构

    公开(公告)号:US20160209757A9

    公开(公告)日:2016-07-21

    申请号:US14298589

    申请日:2014-06-06

    IPC分类号: G03F7/20 G03F1/38

    摘要: A lithography process in a lithography system includes loading a mask that includes two mask states defining an integrated circuit (IC) pattern. The IC pattern includes a plurality of main polygons, wherein adjacent main polygons are assigned to different mask states; and a background includes a field in one of the mask states and a plurality of sub-resolution polygons in another of the two mask states. The lithography process further includes configuring an illuminator to generate an illuminating pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.

    摘要翻译: 光刻系统中的光刻工艺包括加载包含限定集成电路(IC)图案的两个掩模状态的掩模。 IC图案包括多个主多边形,其中相邻的主多边形被分配到不同的掩模状态; 并且背景包括掩模状态之一的场和在两个掩模状态中的另一掩码状态中的多个子分辨率多边形。 光刻工艺还包括配置照明器以在光刻系统的照明光瞳平面上产生照明图案; 在光刻系统的投影光瞳平面上用根据照明图案确定的滤光图案配置光瞳滤光器; 并且利用照明器,掩模和瞳孔滤光器对目标进行曝光处理。 曝光过程在掩模后面产生衍射光和非衍射光,瞳孔滤光器去除大部分非衍射光。

    EUV MASK WITH ITO ABSORBER TO SUPPRESS OUT OF BAND RADIATION
    9.
    发明申请
    EUV MASK WITH ITO ABSORBER TO SUPPRESS OUT OF BAND RADIATION 有权
    具有ITO吸收剂的EUV掩模,以防止带状辐射

    公开(公告)号:US20160124297A1

    公开(公告)日:2016-05-05

    申请号:US14529207

    申请日:2014-10-31

    IPC分类号: G03F1/24 G03F7/20

    CPC分类号: G03F1/24 G03F1/54 G03F7/702

    摘要: The present disclosure also provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains an indium tin oxide (ITO) material. In some embodiments, the ITO material has a SnO6 crystalline structure.

    摘要翻译: 本公开还提供了一种光刻掩模。 光刻掩模包括含有低热膨胀材料(LTEM)的基板。 反射结构设置在衬底上。 覆盖层设置在反射结构上。 吸收层设置在覆盖层上。 吸收层包含氧化铟锡(ITO)材料。 在一些实施例中,ITO材料具有SnO6晶体结构。

    Extreme ultraviolet lithography process and mask
    10.
    发明授权
    Extreme ultraviolet lithography process and mask 有权
    极紫外光刻工艺和面膜

    公开(公告)号:US09316900B2

    公开(公告)日:2016-04-19

    申请号:US14052506

    申请日:2013-10-11

    IPC分类号: G03F1/24

    CPC分类号: G03F1/24 G03F7/2004

    摘要: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having first and second reflective regions. The system also includes an illumination to expose the mask to produce a resultant reflected light form the mask. The resultant reflected light is constructed by a first reflected light reflected from the first reflective region and a second reflected light reflected from the second reflective region. The resultant reflected light contains mainly diffracted light. The system also includes a projection optics box (POB) to collect and direct resultant reflected light to expose a target.

    摘要翻译: 公开了一种极紫外光刻(EUVL)系统。 该系统包括具有第一和第二反射区域的掩模。 该系统还包括照射以暴露掩模以从掩模产生所得到的反射光。 所得到的反射光由从第一反射区反射的第一反射光和从第二反射区反射的第二反射光构成。 所产生的反射光主要包含衍射光。 该系统还包括投影光学盒(POB),用于收集和引导所产生的反射光以暴露靶。