Voltage divider control circuit
    2.
    发明授权
    Voltage divider control circuit 有权
    分压器控制电路

    公开(公告)号:US08923078B2

    公开(公告)日:2014-12-30

    申请号:US13751240

    申请日:2013-01-28

    IPC分类号: G11C7/00 H03K17/284

    摘要: One or more techniques or systems for controlling a voltage divider are provided herein. In some embodiments, a control circuit is configured to bias a pull up unit of a voltage divider using an analog signal, thus enabling the voltage divider to be level tunable. In other words, the control circuit enables the voltage divider to output multiple voltage levels. Additionally, the control circuit is configured to bias the pull up unit based on a bias timing associated with a pull down unit of the voltage divider. For example, the pull up unit is activated after the pull down unit is activated. In this manner, the control circuit provides a timing boost, thus enabling the voltage divider to stabilize more quickly.

    摘要翻译: 本文提供了用于控制分压器的一种或多种技术或系统。 在一些实施例中,控制电路被配置为使用模拟信号来偏置分压器的上拉单元,从而使分压器能够可调。 换句话说,控制电路使得分压器能够输出多个电压电平。 另外,控制电路被配置为基于与分压器的下拉单元相关联的偏置定时偏压上拉单元。 例如,下拉单元启动后,上拉单元被激活。 以这种方式,控制电路提供定时提升,从而使得分压器能够更快地稳定。

    VOLTAGE DIVIDER CONTROL CIRCUIT
    3.
    发明申请
    VOLTAGE DIVIDER CONTROL CIRCUIT 有权
    电压分压器控制电路

    公开(公告)号:US20140211574A1

    公开(公告)日:2014-07-31

    申请号:US13751240

    申请日:2013-01-28

    IPC分类号: H03K17/284 G11C7/00

    摘要: One or more techniques or systems for controlling a voltage divider are provided herein. In some embodiments, a control circuit is configured to bias a pull up unit of a voltage divider using an analog signal, thus enabling the voltage divider to be level tunable. In other words, the control circuit enables the voltage divider to output multiple voltage levels. Additionally, the control circuit is configured to bias the pull up unit based on a bias timing associated with a pull down unit of the voltage divider. For example, the pull up unit is activated after the pull down unit is activated. In this manner, the control circuit provides a timing boost, thus enabling the voltage divider to stabilize more quickly.

    摘要翻译: 本文提供了用于控制分压器的一种或多种技术或系统。 在一些实施例中,控制电路被配置为使用模拟信号来偏置分压器的上拉单元,从而使分压器能够可调。 换句话说,控制电路使得分压器能够输出多个电压电平。 另外,控制电路被配置为基于与分压器的下拉单元相关联的偏置定时偏压上拉单元。 例如,下拉单元启动后,上拉单元被激活。 以这种方式,控制电路提供定时提升,从而使得分压器能够更快地稳定。

    Level shifter with improved voltage difference

    公开(公告)号:US10263621B2

    公开(公告)日:2019-04-16

    申请号:US15468296

    申请日:2017-03-24

    摘要: A level shifter that comprises an input operating in an input voltage domain and an output for outputting an output signal in an output voltage domain. The level shifter further includes an inverter circuit operating in the input voltage domain for inverting an input signal to create an inverted input signal. The level shifter also includes an intermediate circuit operating in an intermediate voltage domain for generating an intermediate signal. An output buffer circuit generates the output signal based at least in part on the inverted input signal and the intermediate signal.

    Level Shifter
    7.
    发明申请
    Level Shifter 审中-公开

    公开(公告)号:US20180278252A1

    公开(公告)日:2018-09-27

    申请号:US15468296

    申请日:2017-03-24

    IPC分类号: H03K19/0185

    CPC分类号: H03K19/018521

    摘要: A level shifter that comprises an input operating in an input voltage domain and an output for outputting an output signal in an output voltage domain. The level shifter further includes an inverter circuit operating in the input voltage domain for inverting an input signal to create an inverted input signal. The level shifter also includes an intermediate circuit operating in an intermediate voltage domain for generating an intermediate signal. An output buffer circuit generates the output signal based at least in part on the inverted input signal and the intermediate signal.