Taker-in-part of the conventional flat card
    1.
    发明授权
    Taker-in-part of the conventional flat card 失效
    传统平板卡的部分

    公开(公告)号:US4064598A

    公开(公告)日:1977-12-27

    申请号:US652992

    申请日:1976-01-28

    CPC分类号: D01G15/805 D01G15/42

    摘要: In a high production card, a taker-in undercasing without slits or apertures is disposed beneath a taker-in roller of a card and a suction device is disposed above the taker-in roller. A taker-in cover is mounted atop the taker-in roller and defines therebetween a sealed space in communication with the suction device, which suction device controls the air pressure in said space between the taker-in roller and the taker-in undercasing, so that impurities such as trash are mainly removed from the supplied fibers at a free space below the taker-in roller formed at a position upstream from the taker-in undercasing, and short fibers are separated from successive fibers mainly by the action of the suction device.

    摘要翻译: 在高生产卡中,没有狭缝或孔的接收器底座设置在卡的接纳辊下面,并且抽吸装置设置在接纳辊上。 收纳器盖安装在收纳辊的顶部,并在其间限定与抽吸装置连通的密封空间,该抽吸装置控制收纳辊和收纳器之间的所述空间中的空气压力,因此 主要是通过抽吸装置的作用将短纤维从连续的纤维分离出来,所以杂质如垃圾主要从提供的纤维在形成于接收器底层的上游位置的接纳辊下面的自由空间处被除去, 。

    Method and apparatus for plucking fiber tufts from a fiber bale
    2.
    发明授权
    Method and apparatus for plucking fiber tufts from a fiber bale 失效
    从纤维包中拔出纤维束的方法和装置

    公开(公告)号:US3945085A

    公开(公告)日:1976-03-23

    申请号:US503267

    申请日:1974-09-05

    IPC分类号: D01G7/00 D01G7/08 D01G7/06

    CPC分类号: D01G7/00 D01G7/08

    摘要: An improved method and apparatus for plucking fiber tufts from a fiber bale held by a supporting frame which is reciprocally displaced along a carrying passage over a plucking roller. A pair of conveyer means are disposed with an intervened space therebetween and the plucking roller is disposed in the abovementioned intervened space. An auxiliary conveyer means is disposed at a position adjacently outside one of the conveyer means. These three conveyer means are arranged in an alignment. The supporting frame is capable of being reciprocally displaced by the conveyer means between displacing terminals on said conveyer means and is capable of being displaced to a waiting position on one of the conveyer means which is outside of the displacing terminal on that conveyer means and at a side of the auxiliary conveyer means.A door means of the supporting frame is opened during the displacing motion of the supporting frame to the waiting position, and then a fresh fiber bale reserved on the auxiliary conveyer means is supplied into the supporting frame, thereafter the supporting frame is displaced to the normal operational position thereof. A loading plate is mounted on the supporting frame so as to uniformly press the fiber bale during the bale plucking operation. All of the above-mentioned operations are carried out automatically.

    摘要翻译: 一种用于从由支撑框架保持的纤维束中拔出纤维簇的改进方法和装置,其沿着承载通道在拔除辊上往复移位。 一对输送装置设置在其间具有中间空间,并且所述拔除辊设置在上述中间空间中。 辅助输送装置设置在相邻地位于输送装置之一的位置。 这三个输送装置排成一排。 支撑框架能够通过传送装置在所述传送装置上的位移端之间往复移位,并且能够被移动到在该传送装置上的位移端子外部的传送装置之一上的等待位置 辅助输送装置的一侧。

    Synchronization word detection apparatus
    3.
    发明授权
    Synchronization word detection apparatus 失效
    同步字检测装置

    公开(公告)号:US5073906A

    公开(公告)日:1991-12-17

    申请号:US624201

    申请日:1990-12-06

    IPC分类号: H04L7/08 H04L7/02 H04L7/04

    CPC分类号: H04L7/042

    摘要: A synchronization (sync) word detection apparatus which, on receiving a signal in which a sync word having a predetermined length (N) is inserted beforehand, detects the sync word out of a demodulated and soft-decided sequence of the received signal. A cross correlator (4) calculates a cross correlation value of the soft-decided and demodulated sequence fed thereto and the sync word. A threshold generating section (1, 2, 3) determines a means power of the demodulated and soft-decided sequence and generates a threshold value on the basis of the mean power. A comparing circuit (5) produces a detection signal when the cross correlation exceeds the threshold value. The apparatus reduces the false detection probability and misdetection prbability even when the receive field intensity sharply changes on a transmission path.

    Carrier recovery circuit for offset QPSK demodulators
    4.
    发明授权
    Carrier recovery circuit for offset QPSK demodulators 失效
    用于偏移QPSK解调器的载波恢复电路

    公开(公告)号:US4871975A

    公开(公告)日:1989-10-03

    申请号:US289617

    申请日:1988-12-23

    摘要: A carrier recovery circuit comprises a voltage-controlled oscillator with a .pi./2 phase shifter coupled to it for generating carriers of quadrature phase relationship. First and second phase comparators respectively detect phase differences between an offset QPSK modulated signal and the carriers of the quadrature phase relationship. Signal from the first phase comparator is delayed by a 1/2 symbol duration and applied to one input of a quadri-phase detector having stable phase angles at .pi./4, (3/4).pi., (5/4).pi. and (7/4).pi. radian and signal from the second phase comparator is applied to the other input of the quadri-phase detector. A bit timing recovery field (1010 . . . 1010) of the second channel is detected from the output of the second phase comparator. Signal from the quadri-phase detector is applied to a loop filter and thence to the voltage-controlled oscillator during the time when a bit timing recovery field (BTR) of the second channel is not still detected. To stabilize the operation of the carrier recovery loop of the circuit, the output of the second phase comparator from which that BTR is detected is briefly applied to the loop filter in response to the detection of a BTR of the second channel, instead of the signal from the quadri-phase detector.

    Phase controlled demodulator for digital communications system
    5.
    发明授权
    Phase controlled demodulator for digital communications system 失效
    用于数字通信系统的相位控制解调器

    公开(公告)号:US4853642A

    公开(公告)日:1989-08-01

    申请号:US213368

    申请日:1988-06-30

    IPC分类号: H03L7/12 H04L27/00 H04L27/227

    摘要: In a phase controlled demodulator, a modulated digital input signal is demodulated into quadrature signals with a carrier recovered by a voltage controlled oscillator. A phase difference between the quadrature signals is detected by a phase detector of Costas loop and applied through a loop filter to the voltage controlled oscillator to control the frequency and phase of the recovered carrier when the frequency deviation between the received and recovered carriers is within a phase control range. When the frequency deviation exceeds the phase control range, the output of the phase detector is a beat of the two carriers and a frequency sweep control voltage is applied to the VCO to search for the missing carrier. The magnitude of the beat is detected and compared with a predetermined threshold value. When the frequency deviation is far beyond the control range, the magnitude of the beat is lower than the threshold, but exceeds it at the instant the demodulator enters the control range, whereupon the frequency sweep control voltage is removed from the VCO.

    Carrier wave recovery circuit
    6.
    发明授权
    Carrier wave recovery circuit 失效
    载波恢复电路

    公开(公告)号:US4097813A

    公开(公告)日:1978-06-27

    申请号:US803900

    申请日:1977-06-06

    IPC分类号: H04L27/10 H04L27/227 H03K9/00

    CPC分类号: H04L27/2276

    摘要: A circuit for extracting a carrier wave signal from a double binary PSK signal input is disclosed. The PSK input signal is applied to a first frequency doubler which doubles the frequency of the input signal. The output of the first frequency doubler is applied to a second frequency doubler and to first and second band-pass filter circuits. The second frequency doubler serves to quadruple the frequency of the PSk input signal and derives a signal having a line spectrum at the frequency 4fc whenever there is no phase shift between successive time slots of the PSK signal. The first and second band-pass filters derive first and second signals having line spectra at frequencies 2fc + fs and 2fc - fs, respectively, whenever there is a phase shift of +90.degree. or -90.degree., respectively, between successive time slots of the PSK input signal. The outputs of the band-pass filter circuits are combined in first and second frequency mixers with a clock frequency signal which is synchronized with the clock frequency component of the input signal. The outputs of the frequency mixers are combined in a first signal combiner circuit whose output is applied to third frequency doubler. The output of the third frequency doubler has a line spectrum at 4fc whenever there is a .+-. 90.degree. phase shift between successive time slots of the PSK input signal. The outputs of the first and third frequency doublers are combined in a second signal combiner and applied to a carrier wave synchronizing circuit which derives the desired synchronized carrier wave.

    摘要翻译: 公开了一种从双二进制PSK信号输入端提取载波信号的电路。 PSK输入信号被施加到将输入信号的频率加倍的第一倍频器。 第一倍频器的输出被施加到第二倍频器和第一和第二带通滤波器电路。 当PSK信号的连续时隙之间没有相移时,第二倍频器用于使PSk输入信号的频率增加四倍,并且导出具有频率为4fc的线谱的信号。 第一和第二带通滤波器分别衍生具有频率为2fc + fs和2fc-fs的线谱的第一和第二信号,每当在相继的时隙之间存在+90°或-90°的相移时, PSK输入信号。 带通滤波器电路的输出在第一和第二混频器中与与输入信号的时钟频率分量同步的时钟频率信号组合。 混频器的输出组合在第一信号组合器电路中,其输出被施加到第三倍频器。 当PSK输入信号的连续时隙之间存在+/- 90°相移时,第三倍频器的输出具有4fc的线谱。 第一和第三频率倍增器的输出在第二信号组合器中组合,并被应用于导出期望的同步载波的载波同步电路。

    Spread packet communication system
    7.
    发明授权
    Spread packet communication system 失效
    扩展分组通信系统

    公开(公告)号:US5245612A

    公开(公告)日:1993-09-14

    申请号:US643793

    申请日:1991-01-22

    IPC分类号: H04B7/216

    CPC分类号: H04B7/216

    摘要: A satellite packet communication system comprising a central station and VSAT stations. The central station generates chip-rate clock pulses and transmits a series of data on timeslots of a frame to a satellite transponder, and a plurality of terminal stations. Each VSAT station receives the frame from the transponder and recovers the chip-rate clock pulses from the received frame. A pseudorandom number (PN) sequence generator, provided in the terminal station is synchronized with the recovered chip-rate clock pulses for generating bits of a PN sequence with which packetized data bits are pseudorandomly modulated and transmitted in burst form to the transponder. The central station includes a correlator which is synchronized with the central station's chip-rate clock pulses to detect correlations between the pseudorandomly modulated data bits a sequence of pseudorandom numbers corresponding to the PN sequence bits of the terminal stations.

    摘要翻译: 一种包括中心站和VSAT站的卫星分组通信系统。 中心站产生码片速率时钟脉冲,并将一帧数据发送到卫星转发器和多个终端站。 每个VSAT站从应答器接收帧并从接收帧恢复码片速率时钟脉冲。 在终端站中提供的伪随机数(PN)序列发生器与恢复的码片速率时钟脉冲同步,用于产生PN序列的比特,以分组形式的数据比特被伪随机调制并以突发形式发送到应答器。 中央站包括相关器,其与中心站的芯片速率时钟脉冲同步,以检测伪随机调制数据位之间与终端站的PN序列比特对应的伪随机数序列的相关性。

    Error correction apparatus using a Viterbi decoder
    8.
    发明授权
    Error correction apparatus using a Viterbi decoder 失效
    使用维特比解码器的纠错装置

    公开(公告)号:US4606027A

    公开(公告)日:1986-08-12

    申请号:US659533

    申请日:1984-10-10

    申请人: Susumu Otani

    发明人: Susumu Otani

    IPC分类号: H03M13/23 H03M13/41 G06F11/10

    CPC分类号: H03M13/395 H03M13/41

    摘要: In an error correcting apparatus, an add-compare-select circuit is provided for each state in a given time slot of a Viterbi trellis diagram. The ACS circuit includes first and second pairs of adders coupled to a source of sequentially updated path metrics and to a branch metric generator which generates sums of branch metrics over successive time slots. The updated path metrics of states two time slots prior to the given time slot and the branch metric sums are added up in the adders. The outputs of adders in pairs are compared respectively by first comparators to determine the highest of the adder outputs. The determined highest values are passed through first selectors to a second comparator to further determine the highest of the selected adder outputs, the further determined value being passed through a second selector to the path metric source to update the previous value. Control signals indicating the determinations taken by the first and second comparators are coupled to a path memory for storing data indicating the paths of the selected values.

    摘要翻译: 在纠错装置中,在维特比网格图的给定时隙中为每个状态提供加法比较选择电路。 ACS电路包括耦合到顺序更新的路径度量的源的第一和第二对加法器以及在连续时隙上产生分支度量的和的分支度量发生器。 给定时隙之前的两个时隙的状态的更新的路径度量和分支度量总和在加法器中相加。 成对加法器的输出通过第一比较器进行比较,以确定加法器输出的最高值。 所确定的最高值通过第一选择器传递到第二比较器,以进一步确定所选择的加法器输出中的最高值,进一步确定的值通过第二选择器传递到路径度量源以更新先前值。 指示由第一和第二比较器取得的确定的控制信号被耦合到路径存储器,用于存储指示所选值的路径的数据。

    Method and device for supplying a fresh cotton bale in a bale plucking
machine
    9.
    发明授权
    Method and device for supplying a fresh cotton bale in a bale plucking machine 失效
    在捆包机中提供新鲜棉包的方法和装置

    公开(公告)号:US3978552A

    公开(公告)日:1976-09-07

    申请号:US502924

    申请日:1974-09-04

    IPC分类号: D01G7/00 D01G7/08 D01G7/04

    CPC分类号: D01G7/08 D01G7/00

    摘要: In a bale plucking machine wherein a fiber bale is reciprocally displaced between a pair of displacement terminals by a pair of conveyer means disposed with an intervening space therebetween and fiber tufts are continuously plucked from the fiber bale by a plucking roller when the fiber bale passes over the plucking roller, a method and device for supplying a fresh fiber bale on the conveyer means. When the thickness of the processing fiber bale has been reduced to a predetermined limit, the processing fiber bale is displaced to a waiting position formed on an extended portion of one of the conveyer means outside the terminal of the reciprocal displacement thereof, and the conveyer means are stopped. Thereafter a fresh fiber bale is supplied onto the processing fiber bale reserved at the waiting position. During the above-mentioned supply motion, the driving of the conveyer means is again commenced.

    摘要翻译: 一种捆扎机,其中纤维束通过一对传送装置在一对位移端子之间往复移位,该传送装置在它们之间设置有介于其间的空间,当纤维束通过时,纤维束通过拔丝辊从纤维束中被连续地从纤维束中拔出 拔丝辊,用于在输送装置上提供新鲜纤维束的方法和装置。 当处理纤维束的厚度已经减小到预定的极限时,处理纤维束被移动到形成在输送装置中的一个输送装置的延伸部分上的等待位置,并且其输送装置 被停止 此后,将新鲜的纤维束提供到在等待位置处保留的加工纤维束上。 在上述供给运动期间,传送装置的驱动再次开始。

    MANUFACTURING METHOD OF FLAT-PANEL DISPLAY DEVICE AND ADHESIVE-RESIN APPLICATION APPARATUS THEREFOR
    10.
    发明申请
    MANUFACTURING METHOD OF FLAT-PANEL DISPLAY DEVICE AND ADHESIVE-RESIN APPLICATION APPARATUS THEREFOR 有权
    平板显示装置及其粘合剂应用装置的制造方法

    公开(公告)号:US20110155318A1

    公开(公告)日:2011-06-30

    申请号:US12979044

    申请日:2010-12-27

    摘要: An embodiment of manufacturing method of a flat-panel display device having a display panel and a transparent protector sheet; comprises: setting a bi-directionally Y-shape branched line pattern within a rectangular to-be-bonded area, which is formed of two Y-shaped intersections of a center line and angle bisector lines of the corners, of the to-be-bonded area; and applying adhesive resin onto the protector sheet or onto the display panel by forming circular or ellipsoidal dot patterns of applied adhesive resin so that: the dot patterns are arranged on the center-line segment and on the branch lines or their vicinities; and the dot patterns are arranged in symmetry with respect to the center line and to its perpendicular bisector.

    摘要翻译: 具有显示面板和透明保护片的平板显示装置的制造方法的一个实施例; 包括:在待切割区域中设置双向Y形分支线图案,所述双向Y字形分支线图案由要形成的角部的中心线和角平分线之间的两个Y形交叉点形成, 保税区 并通过形成施加的粘合剂树脂的圆形或椭球形图案将粘合剂树脂施加到保护片或显示面板上,使得:点图案布置在中心线段和分支线或其附近; 并且点图案相对于中心线和其垂直的平分线对称布置。