-
公开(公告)号：US20130051134A1
公开(公告)日：2013-02-28
申请号：US13643880
申请日：2011-04-05
IPC分类号： G11C11/16
CPC分类号： H01L27/228 , G11C7/1006 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , G11C11/5607
摘要： The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
摘要翻译： 所公开的半导体记录装置使用自旋注入磁化 - 反转隧道磁阻元件（TMR元件）实现多值读取和写入。 与在多个TMR元件之间需要最大电流以使其磁化反转的元件至少具有相同值的第一电流在引起反向并联状态或反并联状态的方向上， 应用于具有多个TMR元件的存储单元，然后施加与第一电流相反方向的第二电流，并且其中只有反转至少一个TMR元件的磁阻状态所需的值，除了需要 多个TMR元件中的最大电流被施加到每个，并且执行多值写入。
-
公开(公告)号：US08750032B2
公开(公告)日：2014-06-10
申请号：US13643880
申请日：2011-04-05
IPC分类号： G11C11/00
CPC分类号： H01L27/228 , G11C7/1006 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , G11C11/5607
摘要： The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
摘要翻译： 所公开的半导体记录装置使用自旋注入磁化 - 反转隧道磁阻元件（TMR元件）实现多值读取和写入。 与在多个TMR元件之间需要最大电流以使其磁化反转的元件至少具有相同值的第一电流在引起反向并联状态或反并联状态的方向上， 应用于具有多个TMR元件的存储单元，然后施加与第一电流相反方向的第二电流，并且其中只有反转至少一个TMR元件的磁阻状态所需的值，除了需要 多个TMR元件中的最大电流被施加到每个，并且执行多值写入。
-
公开(公告)号：US08427864B2
公开(公告)日：2013-04-23
申请号：US13375751
申请日：2010-06-02
申请人： Takayuki Kawahara , Kiyoo Itoh , Riichiro Takemura , Kenchi Ito
发明人： Takayuki Kawahara , Kiyoo Itoh , Riichiro Takemura , Kenchi Ito
IPC分类号： G11C11/00
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675 , H01L27/228
摘要： To write information on a memory cell of SPRAM formed of an MOS transistor and a tunnel magnetoresistive element, the memory cell is supplied with a current in a direction opposite to a direction of a current required for writing the information on the memory cell, and then, the memory cell is supplied with a current required for writing. In this manner, even when the same information is sequentially written on the memory cell, since the currents in the two directions are caused to flow in pairs in the tunnel magnetoresistive element of the memory cell each time information is rewritten, deterioration of a film that forms the tunnel magnetoresistive element can be suppressed. Therefore, reliability of the SPRAM can be improved.
摘要翻译： 为了在由MOS晶体管和隧道磁阻元件形成的SPRAM的存储单元上写入信息，向存储单元提供与在存储单元上写入信息所需的电流方向相反的方向的电流，然后 ，为存储单元提供写入所需的电流。 以这种方式，即使当相同的信息被顺序地写入存储单元时，由于每当信息被重写时，两个方向上的电流成对地在存储单元的隧道磁阻元件中成对流动，所以， 可以抑制隧道磁阻元件的形成。 因此，可以提高SPRAM的可靠性。
-
公开(公告)号：US20120081952A1
公开(公告)日：2012-04-05
申请号：US13375751
申请日：2010-06-02
申请人： Takayuki Kawahara , Kiyoo Itoh , Riichiro Takemura , Kenchi Ito
发明人： Takayuki Kawahara , Kiyoo Itoh , Riichiro Takemura , Kenchi Ito
IPC分类号： G11C11/16
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675 , H01L27/228
摘要： To write information on a memory cell of SPRAM formed of an MOS transistor and a tunnel magnetoresistive element, the memory cell is supplied with a current in a direction opposite to a direction of a current required for writing the information on the memory cell, and then, the memory cell is supplied with a current required for writing. In this manner, even when the same information is sequentially written on the memory cell, since the currents in the two directions are caused to flow in pairs in the tunnel magnetoresistive element of the memory cell each time information is rewritten, deterioration of a film that forms the tunnel magnetoresistive element can be suppressed. Therefore, reliability of the SPRAM can be improved.
摘要翻译： 为了在由MOS晶体管和隧道磁阻元件形成的SPRAM的存储单元上写入信息，向存储单元提供与在存储单元上写入信息所需的电流方向相反的方向的电流，然后 ，为存储单元提供写入所需的电流。 以这种方式，即使当相同的信息被顺序地写入存储单元时，由于每当信息被重写时，两个方向上的电流成对地在存储单元的隧道磁阻元件中成对流动，所以， 可以抑制隧道磁阻元件的形成。 因此，可以提高SPRAM的可靠性。
-
公开(公告)号：US07230867B2
公开(公告)日：2007-06-12
申请号：US11206016
申请日：2005-08-18
IPC分类号： G11C7/00
CPC分类号： G11C7/065 , G11C5/025 , G11C5/14 , G11C7/06 , G11C7/08 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C2207/065 , H01L27/0207 , H01L27/10894
摘要： A sense amplifier capable of performing high-speed data sense operation with lower power consumption using a minuscule signal from a memory cell even in a case where a memory array voltage is reduced. A plurality of drive switches for over-driving are distributively arranged in a sense amplifier area, and a plurality of drive switches for restore operation are concentratively disposed at one end of a row of the sense amplifiers. A potential for over-driving is supplied using a meshed power line circuit. Through the use of the drive switches for over-driving, initial sense operation can be performed on data line pairs with a voltage having an amplitude larger than a data-line amplitude, allowing implementation of high-speed sense operation. The distributed arrangement of the drive switched for over-driving makes it possible to dispersively supply current in sense operation, thereby reducing a difference in sense voltage with respect to far and near positions of the sense amplifiers.
-
公开(公告)号：US06717835B2
公开(公告)日：2004-04-06
申请号：US10347804
申请日：2003-01-22
IPC分类号： G11C506
CPC分类号： G11C7/065 , G11C5/025 , G11C5/14 , G11C7/06 , G11C7/08 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C2207/065 , H01L27/0207 , H01L27/10894
摘要： A sense amplifier capable of performing high-speed data sense operation with lower power consumption using a minuscule signal from a memory cell even in a case where a memory array voltage is reduced. A plurality of drive switches for over-driving are distributively arranged in a sense amplifier area, and a plurality of drive switches for restore operation are concentratively disposed at one end of a row of the sense amplifiers. A potential for over-driving is supplied using a meshed power line circuit. Through the use of the drive switches for over-driving, initial sense operation can be performed on data line pairs with a voltage having an amplitude larger than a data-line amplitude, allowing implementation of high-speed sense operation. The distributed arrangement of the drive switched for over-driving makes it possible to dispersively supply current in sense operation, thereby reducing a difference in sense voltage with respect to far and near positions of the sense amplifiers.
-
公开(公告)号：US08035147B2
公开(公告)日：2011-10-11
申请号：US12768514
申请日：2010-04-27
申请人： Kiyoo Itoh , Riichiro Takemura
发明人： Kiyoo Itoh , Riichiro Takemura
IPC分类号： H01L27/108
CPC分类号： H01L27/10897 , G11C11/4091 , G11C11/4097 , G11C2211/4016 , H01L27/0207 , H01L27/108 , H01L27/1203 , H01L27/1207
摘要： A high-speed and low-voltage DRAM memory cell capable of operating at 1 V or less and an array peripheral circuit are provided. A DRAM cell is comprised of a memory cell transistor and planar capacitor which utilize a FD-SOI MOST structure. Since there is no junction leakage current, loss of stored charge is eliminated, and the low-voltage operation can be realized. Further, a gate and a well in a cross-coupled type sense amplifier using FD-SOI MOSTs are connected. By this means, a threshold value dynamically changes and high-speed sensing operation can be realized.
摘要翻译： 提供能够以1V以下工作的高速低电压DRAM存储单元和阵列外围电路。 DRAM单元由利用FD-SOI MOST结构的存储单元晶体管和平面电容器组成。 由于没有结漏电流，消除了存储电荷的损失，并且可以实现低电压操作。 此外，使用FD-SOI MOST的交叉耦合型读出放大器中的栅极和阱连接。 通过这种方式，阈值动态地变化，并且可以实现高速感测操作。
-
公开(公告)号：US20070211547A1
公开(公告)日：2007-09-13
申请号：US11797984
申请日：2007-05-09
IPC分类号： G11C7/06
CPC分类号： G11C7/065 , G11C5/025 , G11C5/14 , G11C7/06 , G11C7/08 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C2207/065 , H01L27/0207 , H01L27/10894
摘要： A sense amplifier capable of performing high-speed data sense operation with lower power consumption using a minuscule signal from a memory cell even in a case where a memory array voltage is reduced. A plurality of drive switches for over-driving are distributively arranged in a sense amplifier area, and a plurality of drive switches for restore operation are concentratively disposed at one end of a row of the sense amplifiers. A potential for over-driving is supplied using a meshed power line circuit. Through the use of the drive switches for over-driving, initial sense operation can be performed on data line pairs with a voltage having an amplitude larger than a data-line amplitude, allowing implementation of high-speed sense operation. The distributed arrangement of the drive switched for over-driving makes it possible to dispersively supply current in sense operation, thereby reducing a difference in sense voltage with respect to far and near positions of the sense amplifiers.
摘要翻译： 一种读出放大器即使在存储器阵列电压降低的情况下，也能够使用来自存储单元的微小信号，以较低的功耗进行高速数据检测操作。 用于过驱动的多个驱动开关被分布地布置在感测放大器区域中，并且用于恢复操作的多个驱动开关被集中地布置在一行的读出放大器的一端。 使用网状电力线电路提供过驱动的可能性。 通过使用用于过驱动的驱动开关，可以利用具有大于数据线幅度的电压的数据线对执行初始感测操作，从而实现高速感测操作。 驱动器的分布布置使得用于过驱动的驱动器能够在感测操作中分散地提供电流，从而减小感测放大器的远和近位置的感测电压的差异。
-
公开(公告)号：US06944078B2
公开(公告)日：2005-09-13
申请号：US10892271
申请日：2004-07-16
IPC分类号： G11C7/06 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C7/00
CPC分类号： G11C7/065 , G11C5/025 , G11C5/14 , G11C7/06 , G11C7/08 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C2207/065 , H01L27/0207 , H01L27/10894
摘要： A sense amplifier capable of performing high-speed data sense operation with lower power consumption using a minuscule signal from a memory cell even in a case where a memory array voltage is reduced. A plurality of drive switches for over-driving are distributively arranged in a sense amplifier area, and a plurality of drive switches for restore operation are concentratively disposed at one end of a row of the sense amplifiers. A potential for over-driving is supplied using a meshed power line circuit. Through the use of the drive switches for over-driving, initial sense operation can be performed on data line pairs with a voltage having an amplitude larger than a data-line amplitude, allowing implementation of high-speed sense operation. The distributed arrangement of the drive switched for over-driving makes it possible to dispersively supply current in sense operation, thereby reducing a difference in sense voltage with respect to far and near positions of the sense amplifiers.
摘要翻译： 一种读出放大器即使在存储器阵列电压降低的情况下，也能够使用来自存储单元的微小信号，以较低的功耗进行高速数据检测操作。 用于过驱动的多个驱动开关被分布地布置在感测放大器区域中，并且用于恢复操作的多个驱动开关被集中地布置在一行的读出放大器的一端。 使用网状电力线电路提供过驱动的可能性。 通过使用用于过驱动的驱动开关，可以利用具有大于数据线幅度的电压的数据线对执行初始感测操作，从而实现高速感测操作。 驱动器的分布布置使得用于过驱动的驱动器能够在感测操作中分散地提供电流，从而减小感测放大器的远和近位置的感测电压的差异。
-
公开(公告)号：US20050002251A1
公开(公告)日：2005-01-06
申请号：US10892271
申请日：2004-07-16
IPC分类号： G11C7/06 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C7/02
CPC分类号： G11C7/065 , G11C5/025 , G11C5/14 , G11C7/06 , G11C7/08 , G11C11/406 , G11C11/4074 , G11C11/4091 , G11C2207/065 , H01L27/0207 , H01L27/10894
摘要： A sense amplifier capable of performing high-speed data sense operation with lower power consumption using a minuscule signal from a memory cell even in a case where a memory array voltage is reduced. A plurality of drive switches for over-driving are distributively arranged in a sense amplifier area, and a plurality of drive switches for restore operation are concentratively disposed at one end of a row of the sense amplifiers. A potential for over-driving is supplied using a meshed power line circuit. Through the use of the drive switches for over-driving, initial sense operation can be performed on data line pairs with a voltage having an amplitude larger than a data-line amplitude, allowing implementation of high-speed sense operation. The distributed arrangement of the drive switched for over-driving makes it possible to dispersively supply current in sense operation, thereby reducing a difference in sense voltage with respect to far and near positions of the sense amplifiers.
-
-
-
-
-
-
-
-
-
搜索结果
263 条记录 (耗时 0.031 秒)
