公开(公告)号：US09939808B2

公开(公告)日：2018-04-10

申请号：US14570623

申请日：2014-12-15

Applicant: Texas Instruments Incorporated

Inventor： Damien Thomas Gilmore ,  Nicholas Andrew Kusek ,  Kenneth Ryan Thomas ,  Michael Glenn Williams ,  Robert Ray Spangler ,  Ingu Song

IPC: G05B19/418

CPC classification number: G05B19/41875 ,  G05B2219/2602 ,  Y02P90/22

Abstract: A method of process control for a batch process includes pre-measuring a monitor lot to obtain pre-metrology data regarding at least a first process parameter. There are no product units included with the monitor lot. The pre-metrology data is saved together with an identifier for the first monitor unit. A batch is staged for the batch process including at least a first product lot including a plurality of product units together with the first monitor unit. The batch is batch processed through the batch process. After the batch processing, the first monitor unit is measured to obtain post-metrology data for the first process parameter. At least one of the post-metrology data and a difference between the post-metrology data and pre-metrology data is saved to a data file with an identifier for the first product lot or the pre-metrology data and post-metrology data is directly written to the first product lot.

公开(公告)号：US20180166280A1

公开(公告)日：2018-06-14

申请号：US15379251

申请日：2016-12-14

Applicant: Texas Instruments Incorporated

Inventor： Prakash Dalpatbhai Dev ,  Fuchao Wang ,  Nicholas Andrew Kusek

IPC: H01L21/225 ,  H01L21/324 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/2251 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/30655 ,  H01L21/31111 ,  H01L21/324

Abstract: In a described example method, semiconductor wafer with a backside silicon nitride layer is encapsulated with a diffusion barrier layer prior to a high temperature anneal greater than about 1000 degrees Celsius. After the high temperature anneal the diffusion barrier layer and the backside silicon nitride layers are stripped.

公开(公告)号：US10068769B2

公开(公告)日：2018-09-04

申请号：US15379251

申请日：2016-12-14

Applicant: Texas Instruments Incorporated

Inventor： Prakash Dalpatbhai Dev ,  Fuchao Wang ,  Nicholas Andrew Kusek

IPC: H01L21/31 ,  H01L21/225 ,  H01L21/324 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3065

CPC classification number: H01L21/30655 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/26513 ,  H01L21/31111 ,  H01L21/324

Abstract: In a described example method, semiconductor wafer with a backside silicon nitride layer is encapsulated with a diffusion barrier layer prior to a high temperature anneal greater than about 1000 degrees Celsius. After the high temperature anneal the diffusion barrier layer and the backside silicon nitride layers are stripped.