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公开(公告)号:US20220209730A1
公开(公告)日:2022-06-30
申请号:US17136073
申请日:2020-12-29
Applicant: Texas Instruments Incorporated
Inventor: Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
Abstract: Disclosed is a system that comprises an operational amplifier with adjustable operational parameters and a trimming module. The trimming module can adjust the operational parameters of the op-amp based on a memory value to compensate for an offset voltage of the op-amp. The trimming module can comprise successive approximation register (SAR) logic that controls the memory value. The SAR logic can be configured to detect a given memory value that causes an output voltage of the op-amp to be within a predetermined voltage interval when applying a predetermined common mode voltage to inverting and non-inverting inputs of the op-amp.
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公开(公告)号:US11881825B2
公开(公告)日:2024-01-23
申请号:US17136073
申请日:2020-12-29
Applicant: Texas Instruments Incorporated
Inventor: Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
CPC classification number: H03F3/45475 , H03M1/38 , H03M1/66 , H03F2200/375
Abstract: Disclosed is a system that comprises an operational amplifier with adjustable operational parameters and a trimming module. The trimming module can adjust the operational parameters of the op-amp based on a memory value to compensate for an offset voltage of the op-amp. The trimming module can comprise successive approximation register (SAR) logic that controls the memory value. The SAR logic can be configured to detect a given memory value that causes an output voltage of the op-amp to be within a predetermined voltage interval when applying a predetermined common mode voltage to inverting and non-inverting inputs of the op-amp.
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公开(公告)号:US20220360239A1
公开(公告)日:2022-11-10
申请号:US17307327
申请日:2021-05-04
Applicant: Texas Instruments Incorporated
Inventor: Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
Abstract: Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.
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公开(公告)号:US12068730B2
公开(公告)日:2024-08-20
申请号:US17307327
申请日:2021-05-04
Applicant: Texas Instruments Incorporated
Inventor: Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
CPC classification number: H03F3/45475 , H03M1/38 , H03M1/66 , H03F3/211 , H03F2200/129
Abstract: Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.
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