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40 条记录 (耗时 0.044 秒)

    Facemask Dis-assembly Tool
    3.
    发明申请
    Facemask Dis-assembly Tool 有权

    公开(公告)号：US20230066035A1

    公开(公告)日：2023-03-02

    申请号：US17888704

    申请日：2022-08-16

    申请人： Mandeep Singh

    发明人： Mandeep Singh

    IPC分类号： B26F1/14 ,  A41H43/00

    摘要： Tool designed to dis-assemble face masks such that the mask fabric can be recycled. This tool separates mask materials such that the fabric and other components of the masks can be recycled. The tool has a punching element that pushes through the fabric of the mask and only removed the materials other than fabric from the mask. Mask can be simply be inserted in the tool for the separating operation. This tool can dis-assemble single or multiple masks in one operation cycle.

    Scan Insertion Optimization Using Physical Information
    4.
    发明申请
    Scan Insertion Optimization Using Physical Information 失效
    使用物理信息扫描插入优化

    公开(公告)号：US20110296264A1

    公开(公告)日：2011-12-01

    申请号：US12788983

    申请日：2010-05-27

    申请人： Amit Chandra ,  Muthukumaravelu Velayoudame ,  Mandeep Singh ,  Michael Mar

    发明人： Amit Chandra ,  Muthukumaravelu Velayoudame ,  Mandeep Singh ,  Michael Mar

    IPC分类号： G01R31/3177 ,  G06F11/25

    CPC分类号： G01R31/318583

    摘要： In an embodiment, a design methodology and tools to implement the methodology are used to perform scan insertion in an integrated circuit design. The physical location of the scan chains within the boundaries of the integrated circuit may be determined, and the methodology may use the physical information to perform the scan insertion. For example, the physical information may include the location of the inputs and outputs of the scan chains, as well as routability data indicating the ability to insert interconnect in the integrated circuit to make the desired scan connections. The location and routability information may be used to group scan chain inputs and outputs for, e.g., compression/decompression logic. Using physical data to insert scan compression/decompression logic may reduce the amount of area occupied by the scan logic and connectivity, in some embodiments.

    摘要翻译： 在一个实施例中，用于实现该方法的设计方法和工具用于在集成电路设计中执行扫描插入。 可以确定扫描链在集成电路的边界内的物理位置，并且该方法可以使用物理信息来执行扫描插入。 例如，物理信息可以包括扫描链的输入和输出的位置，以及指示在集成电路中插入互连以进行期望的扫描连接的能力的可路由数据。 位置和可路由性信息可用于对例如压缩/解压缩逻辑的扫描链输入和输出进行分组。 在一些实施例中，使用物理数据插入扫描压缩/解压缩逻辑可以减少扫描逻辑和连接所占用的面积的量。

    Fast unaligned memory access
    6.
    发明授权
    Fast unaligned memory access 有权

    公开(公告)号：US10360031B2

    公开(公告)日：2019-07-23

    申请号：US14376825

    申请日：2011-10-21

    申请人： Mandeep Singh ,  Mohammad Abdallah

    发明人： Mandeep Singh ,  Mohammad Abdallah

    IPC分类号： G06F9/30 ,  G06F9/34 ,  G06F9/38 ,  G06F13/16 ,  G06F12/0888

    摘要： Fast unaligned memory access. In accordance with a first embodiment of the present invention, a computing device includes a load queue memory structure configured to queue load operations and a store queue memory structure configured to queue store operations. The computing device includes also includes at least one bit configured to indicate the presence of an unaligned address component for an entry of said load queue memory structure, and at least one bit configured to indicate the presence of an unaligned address component for an entry of said store queue memory structure. The load queue memory may also include memory configured to indicate data forwarding of an unaligned address component from said store queue memory structure to said load queue memory structure.

    Scan insertion optimization using physical information
    7.
    发明授权
    Scan insertion optimization using physical information 失效
    使用物理信息扫描插入优化

    公开(公告)号：US08332699B2

    公开(公告)日：2012-12-11

    申请号：US12788983

    申请日：2010-05-27

    申请人： Amit Chandra ,  Muthukumaravelu Velayoudame ,  Mandeep Singh ,  Michael Mar

    发明人： Amit Chandra ,  Muthukumaravelu Velayoudame ,  Mandeep Singh ,  Michael Mar

    IPC分类号： G01R31/28

    CPC分类号： G01R31/318583

    摘要： In an embodiment, a design methodology and tools to implement the methodology are used to perform scan insertion in an integrated circuit design. The physical location of the scan chains within the boundaries of the integrated circuit may be determined, and the methodology may use the physical information to perform the scan insertion. For example, the physical information may include the location of the inputs and outputs of the scan chains, as well as routability data indicating the ability to insert interconnect in the integrated circuit to make the desired scan connections. The location and routability information may be used to group scan chain inputs and outputs for, e.g., compression/decompression logic. Using physical data to insert scan compression/decompression logic may reduce the amount of area occupied by the scan logic and connectivity, in some embodiments.

    摘要翻译： 在一个实施例中，用于实现该方法的设计方法和工具用于在集成电路设计中执行扫描插入。 可以确定扫描链在集成电路的边界内的物理位置，并且该方法可以使用物理信息来执行扫描插入。 例如，物理信息可以包括扫描链的输入和输出的位置，以及指示在集成电路中插入互连以进行期望的扫描连接的能力的可路由数据。 位置和可路由性信息可用于对例如压缩/解压缩逻辑的扫描链输入和输出进行分组。 在一些实施例中，使用物理数据插入扫描压缩/解压缩逻辑可以减少扫描逻辑和连接所占用的面积的量。