-
1.发明授权Integrated circuit chip design flow methodology including insertion of on-chip or scribe line wireless process monitoring and feedback circuitry 有权集成电路芯片设计流程方法，包括插入片上或划线无线过程监控和反馈电路公开(公告)号：US08097474B2
公开(公告)日：2012-01-17
申请号：US12343686
申请日：2008-12-24
IPC分类号： H01L21/66
CPC分类号： G06F17/5045 , G01R31/2884 , G01R31/3025 , G06F2217/12 , H01L2924/0002 , Y02P90/265 , H01L2924/00
摘要： Disclosed are embodiments of a design and manufacturing system and an associated method that allow for design analysis and for insertion, during wafer manufacture, of intra-process monitoring circuitry. These embodiments use a library of pre-qualified intra-process monitoring circuits and a cross-correlation table that links different monitoring circuits with different IC chip components. Specifically, these embodiments analyze integrated circuit chip design data to identify the components designed into the chip. Then, one or more intra-process monitoring circuits are selected from the library and the design data is modified to include the selected monitoring circuit(s).
摘要翻译： 公开了设计和制造系统以及相关方法的实施例，其允许在晶片制造期间进行设计分析和插入过程内监控电路。 这些实施例使用预定义的内部过程监视电路库和将不同监控电路与不同IC芯片组件链接的互相关表。 具体地，这些实施例分析集成电路芯片设计数据以识别设计到芯片中的部件。 然后，从库中选择一个或多个进程内监控电路，并且修改设计数据以包括所选择的监视电路。
-
2.发明申请Integrated Circuit Chip Design Flow Methodology Including Insertion of On-Chip or Scribe Line Wireless Process Monitoring and Feedback Circuitry 有权集成电路芯片设计流程方法包括插入片上或划线无线过程监控和反馈电路公开(公告)号：US20090239313A1
公开(公告)日：2009-09-24
申请号：US12343686
申请日：2008-12-24
CPC分类号： G06F17/5045 , G01R31/2884 , G01R31/3025 , G06F2217/12 , H01L2924/0002 , Y02P90/265 , H01L2924/00
摘要： Disclosed are embodiments of a design and manufacturing system and an associated method that allow for design analysis and for insertion, during wafer manufacture, of intra-process monitoring circuitry. These embodiments use a library of pre-qualified intra-process monitoring circuits and a cross-correlation table that links different monitoring circuits with different IC chip components. Specifically, these embodiments analyze integrated circuit chip design data to identify the components designed into the chip. Then, one or more intra-process monitoring circuits are selected from the library and the design data is modified to include the selected monitoring circuit(s).
摘要翻译： 公开了设计和制造系统以及相关方法的实施例，其允许在晶片制造期间进行设计分析和插入过程内监控电路。 这些实施例使用预定义的内部过程监视电路库和将不同监控电路与不同IC芯片组件链接的互相关表。 具体地，这些实施例分析集成电路芯片设计数据以识别设计到芯片中的部件。 然后，从库中选择一个或多个进程内监控电路，并且修改设计数据以包括所选择的监视电路。
-
3.发明申请RADIO FREQUENCY IDENTIFICATION (RFID) BASED AUTHENTICATION METHODOLOGY USING STANDARD AND PRIVATE FREQUENCY RFID TAGS 有权无线射频识别（RFID）认证方法使用标准和私有频段RFID标签公开(公告)号：US20100011212A1
公开(公告)日：2010-01-14
申请号：US12171621
申请日：2008-07-11
CPC分类号： H04L9/32 , G06F21/35 , G06F2221/2113 , H04L63/0442 , H04L63/0492 , H04L63/105 , H04L2209/805
摘要： Disclosed is a self-contained hardware-based authentication system that incorporates different authentication protocols for access to soft and/or hard assets with different security levels. The system embodiments include the use of a RFID device that comprises dual RFID tags operating under different frequencies. Specifically, one RFID tag operates on a public frequency and, when activated, transmits an identifier encrypted using a public key. The other RFID tag operates on a private frequency and, when activated, transmits a private key that can be used to decrypt the encrypted identifier. Upon receipt by a processor (e.g., a local processor or security server) of a request for access to a specific asset, a security level for the specific asset is determined. Then, depending upon the particular security level (e.g. low, medium or high) different authentication protocols are instituted using the RFID device. Also disclosed are embodiments of an associated authentication methodology.
摘要翻译： 公开了一种独立的基于硬件的认证系统，其包含用于访问具有不同安全级别的软和/或硬资产的不同认证协议。 系统实施例包括使用包括在不同频率下工作的双RFID标签的RFID设备。 具体地，一个RFID标签在公共频率上操作，并且当被激活时，发送使用公钥加密的标识符。 另一个RFID标签在专用频率上工作，当被激活时，发送可用于解密加密标识符的专用密钥。 在处理器（例如，本地处理器或安全服务器）接收到访问特定资产的请求时，确定特定资产的安全级别。 然后，取决于使用RFID设备建立的特定安全级别（例如，低，中或高）不同的认证协议。 还公开了相关联的认证方法的实施例。
-
公开(公告)号：US10067184B2
公开(公告)日：2018-09-04
申请号：US13294243
申请日：2011-11-11
IPC分类号： G01R27/28 , G01R31/00 , G01R31/14 , G01R31/317
摘要： A method, test system and computer program product and system for voltage binning integrated circuit chips. The method includes selecting or changing a voltage bin of a set of voltages bins corresponding to frequency specification limits of an integrated circuit chip using functional testing of data paths of the integrated circuit chip.
-
5.发明授权Radio frequency identification (RFID) based authentication methodology using standard and private frequency RFID tags 有权基于射频识别（RFID）的认证方法，使用标准和专用RFID标签公开(公告)号：US08176323B2
公开(公告)日：2012-05-08
申请号：US12171621
申请日：2008-07-11
IPC分类号： H04L29/06
CPC分类号： H04L9/32 , G06F21/35 , G06F2221/2113 , H04L63/0442 , H04L63/0492 , H04L63/105 , H04L2209/805
摘要： Disclosed is a self-contained hardware-based authentication system that incorporates different authentication protocols for access to soft and/or hard assets with different security levels. The system embodiments include the use of a RFID device that comprises dual RFID tags operating under different frequencies. Specifically, one RFID tag operates on a public frequency and, when activated, transmits an identifier encrypted using a public key. The other RFID tag operates on a private frequency and, when activated, transmits a private key that can be used to decrypt the encrypted identifier. Upon receipt by a processor (e.g., a local processor or security server) of a request for access to a specific asset, a security level for the specific asset is determined. Then, depending upon the particular security level (e.g., low, medium or high) different authentication protocols are instituted using the RFID device. Also disclosed are embodiments of an associated authentication methodology.
摘要翻译： 公开了一种独立的基于硬件的认证系统，其包含用于访问具有不同安全级别的软和/或硬资产的不同认证协议。 系统实施例包括使用包括在不同频率下工作的双RFID标签的RFID设备。 具体地，一个RFID标签在公共频率上操作，并且当被激活时，发送使用公钥加密的标识符。 另一个RFID标签在专用频率上工作，当被激活时，发送可用于解密加密标识符的专用密钥。 在处理器（例如，本地处理器或安全服务器）接收到访问特定资产的请求时，确定特定资产的安全级别。 然后，根据特定的安全级别（例如，低，中或高）使用RFID设备建立不同的认证协议。 还公开了相关联的认证方法的实施例。
-
6.发明申请Radio Frequency Identification (RFID) Based Authentication System and Methodology 失效基于射频识别（RFID）的认证系统和方法公开(公告)号：US20100011211A1
公开(公告)日：2010-01-14
申请号：US12169834
申请日：2008-07-09
IPC分类号： H04L9/06
CPC分类号： G06F21/35 , H04L9/3226 , H04L2209/805
摘要： Disclosed are embodiments of a radio frequency identification (RFID) authentication system and an associated authentication methodology. The embodiments incorporate an identification device (e.g., an identification badge, a key fob, etc.) with an embedded RFID tag. The embedded RFID tag is associated with a specific user and stores a private key generated as part of a public key-private key encryption scheme. The private key is read by an RFID reader and used to decode public key encrypted data stored within or accessible by a computer system (e.g., a desktop computer system, a laptop computer system, a personal digital assistant (PDA), a digital fax machine, wireless telephone, etc.). Thus, the embodiments provide a portable way to use public key-private key encryption scheme data anywhere using RFID technology.
摘要翻译： 公开了射频识别（RFID）认证系统和相关认证方法的实施例。 这些实施例将识别装置（例如，识别徽章，密钥卡等）与嵌入式RFID标签相结合。 嵌入式RFID标签与特定用户相关联，并且存储作为公共密钥私钥加密方案的一部分而生成的专用密钥。 私钥由RFID读取器读取并用于解码存储在计算机系统内的公共密钥加密数据（例如，台式计算机系统，膝上型计算机系统，个人数字助理（PDA），数字传真机 ，无线电话等）。 因此，实施例提供了使用RFID技术在任何地方使用公共密钥 - 私钥加密方案数据的便携式方法。
-
公开(公告)号：US20130124133A1
公开(公告)日：2013-05-16
申请号：US13294243
申请日：2011-11-11
IPC分类号： G06F19/00
CPC分类号： G01R31/31718
摘要： A method, test system and computer program product and system for voltage binning integrated circuit chips. The method includes selecting or changing a voltage bin of an integrated circuit chip using functional testing of data paths of the integrated circuit chip.
摘要翻译： 一种用于电压组合集成电路芯片的方法，测试系统和计算机程序产品和系统。 该方法包括使用集成电路芯片的数据路径的功能测试来选择或改变集成电路芯片的电压仓。
-
8.发明授权Radio frequency identification (RFID) based authentication system and methodology 失效基于射频识别（RFID）的认证系统和方法公开(公告)号：US08214651B2
公开(公告)日：2012-07-03
申请号：US12169834
申请日：2008-07-09
CPC分类号： G06F21/35 , H04L9/3226 , H04L2209/805
摘要： Disclosed are embodiments of a radio frequency identification (RFID) authentication system and an associated authentication methodology. The embodiments incorporate an identification device (e.g., an identification badge, a key fob, etc.) with an embedded RFID tag. The embedded RFID tag is associated with a specific user and stores a private key generated as part of a public key-private key encryption scheme. The private key is read by an RFID reader and used to decode public key encrypted data stored within or accessible by a computer system (e.g., a desktop computer system, a laptop computer system, a personal digital assistant (PDA), a digital fax machine, wireless telephone, etc.). Thus, the embodiments provide a portable way to use public key-private key encryption scheme data anywhere using RFID technology.
摘要翻译： 公开了射频识别（RFID）认证系统和相关认证方法的实施例。 这些实施例将识别装置（例如，识别徽章，密钥卡等）与嵌入式RFID标签相结合。 嵌入式RFID标签与特定用户相关联，并且存储作为公共密钥私钥加密方案的一部分而生成的专用密钥。 私钥由RFID读取器读取并用于解码存储在计算机系统内的公共密钥加密数据（例如，台式计算机系统，膝上型计算机系统，个人数字助理（PDA），数字传真机 ，无线电话等）。 因此，实施例提供了使用RFID技术在任何地方使用公共密钥 - 私钥加密方案数据的便携式方法。
-
9.发明申请Integrated Circuit Having State-Saving Input-Output Circuitry and a Method of Testing Such an Integrated Circuit 审中-公开具有省电输入输出电路的集成电路和测试这种集成电路的方法公开(公告)号：US20080129330A1
公开(公告)日：2008-06-05
申请号：US11566259
申请日：2006-12-04
IPC分类号： H03K19/00 , H03K19/003
CPC分类号： G01R31/31713
摘要： An integrated circuit that includes input/output (I/O) state saving circuitry capable of stabilizing the I/O states during any predicted I/O disturbance event. The I/O state saving circuitry includes a plurality of transparent latches arranged between the output of a plurality of respective I/O receivers and the internal digital, analog, or mixed-signal circuitry of the integrated circuit. The transparent latches are transitioned between a pass-through mode and a state-saving mode via a common control signal. In anticipation of, for example, a predicted I/O signal disturbance generating event, the transparent latches are set to the state-saving mode. Consequently, the outputs of the transparent latches are held stable and glitchless during the disturbance event, which ensures that the internal logic of the integrated circuit does not lose state.
摘要翻译： 一种集成电路，其包括能够在任何预测的I / O干扰事件期间稳定I / O状态的输入/输出（I / O）状态保存电路。 I / O状态保存电路包括布置在多个相应I / O接收器的输出端与集成电路的内部数字，模拟或混合信号电路之间的多个透明锁存器。 透明锁存器通过公共控制信号在通过模式和状态保存模式之间转换。 在预期的例如预测的I / O信号干扰发生事件中，透明锁存器被设置为状态保存模式。 因此，在干扰事件期间，透明锁存器的输出保持稳定和无毛刺，这确保了集成电路的内部逻辑不会失去状态。
-
-
-
-
-
-
-
-
搜索结果
9 条记录 (耗时 0.021 秒)
