摘要:
In a double-spacer or multi-spacer approach to the formation of sophisticated field effect transistors, an upper sidewall portion of a gate electrode may be effectively exposed during recessing of an outer spacer element, since the outer spacer is substantially comprised of the same material as the liner material. Consequently, the anisotropic etch process for recessing the outer sidewall spacer also efficiently removes liner residues on the upper sidewall portion and provides an increased diffusion path for a refractory metal. Additionally, the lateral extension of the silicide regions on the drain and source area may be increased by correspondingly controlling an isotropic etch process for removing oxide residues.
摘要:
In a double-spacer or multi-spacer approach to the formation of sophisticated field effect transistors, an upper sidewall portion of a gate electrode may be effectively exposed during recessing of an outer spacer element, since the outer spacer is substantially comprised of the same material as the liner material. Consequently, the anisotropic etch process for recessing the outer sidewall spacer also efficiently removes liner residues on the upper sidewall portion and provides an increased diffusion path for a refractory metal. Additionally, the lateral extension of the silicide regions on the drain and source area may be increased by correspondingly controlling an isotropic etch process for removing oxide residues.
摘要:
The present invention provides a technique that enables the formation of a recessed spacer element by using an anisotropically deposited etch stop layer. Accordingly, in subsequent cleaning processes, material residues of the etch stop layer may be efficiently removed from upper sidewall portions of a line element, thereby increasing the available area for a diffusion path in a subsequent silicidation process. The anisotropic deposition of the etch stop layer may be accomplished by high density plasma enhanced CVD or by directional sputter techniques.
摘要:
The present invention provides a technique that enables the formation of a recessed spacer element by using an anisotropically deposited etch stop layer. Accordingly, in subsequent cleaning processes, material residues of the etch stop layer may be efficiently removed from upper sidewall portions of a line element, thereby increasing the available area for a diffusion path in a subsequent silicidation process. The anisotropic deposition of the etch stop layer may be accomplished by high density plasma enhanced CVD or by directional sputter techniques.
摘要:
By reducing a deposition rate and maintaining a low bias power in a plasma atmosphere, a spacer layer, for example a silicon nitride layer, may be deposited that exhibits tensile stress. The amount of tensile stress is controllable within a wide range, thereby providing the potential for forming sidewall spacer elements that modify the charge carrier mobility and thus the conductivity of the channel region of a field effect transistor.
摘要:
Wafer-to-wafer thickness uniformity may be improved significantly in a process for depositing a silicon nitride layer in that the flow rate of the reactant and the chamber pressure are varied during a deposition cycle. By correspondingly adapting the flow rate and/or the chamber pressure before and after the actual deposition step, the process conditions may be more effectively stabilized, thereby reducing process variations, even after non-deposition phases of the deposition tool, such as a preceding plasma clean process or an idle period of the tool.
摘要:
Wafer-to-wafer thickness uniformity may be improved significantly in a process for depositing a silicon nitride layer in that the flow rate of the reactant and the chamber pressure are varied during a deposition cycle. By correspondingly adapting the flow rate and/or the chamber pressure before and after the actual deposition step, the process conditions may be more effectively stabilized, thereby reducing process variations, even after non-deposition phases of the deposition tool, such as a preceding plasma clean process or an idle period of the tool.
摘要:
By performing a re-sputter process during the formation of a barrier layer for a contact opening in a tungsten-based process, the reliability of the tungsten deposition, as well as the performance of the resulting contact plug, may be enhanced. During the re-sputtering process, a thickness of the titanium-based barrier layer may be reduced at the contact bottom, while at the same time the material is re-condensed on critical lower sidewall portions of the contact opening.
摘要:
By providing a tungsten nitride barrier layer for a contact plug, well-approved copper-based via formation techniques may be used to form a highly conductive contact plug, thereby significantly reducing the series resistance compared to conventional tungsten-based contact plugs. The tungsten nitride barrier layer may be deposited by ALD techniques, which exhibit superior step coverage and thus allow a reliable coverage of exposed surfaces of the contact opening, thereby providing the potential for using copper or copper alloys even in the vicinity of highly sensitive device areas of circuit elements, such as transistors and the like.
摘要:
By reducing a deposition rate and maintaining a low bias power in a plasma atmosphere, a spacer layer, for example a silicon nitride layer, may be deposited that exhibits tensile stress. The amount of tensile stress is controllable within a wide range, thereby providing the potential for forming sidewall spacer elements that modify the charge carrier mobility and thus the conductivity of the channel region of a field effect transistor.