公开(公告)号：US20080152952A1

公开(公告)日：2008-06-26

申请号：US11949988

申请日：2007-12-04

申请人： Tiffany S. Santos ,  Joo Sang Lee ,  Hyunja Shim ,  Jagadeesh S. Moodera

发明人： Tiffany S. Santos ,  Joo Sang Lee ,  Hyunja Shim ,  Jagadeesh S. Moodera

IPC分类号： G11B5/39 ,  H01L21/02

CPC分类号： H01L43/08 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/1284 ,  G11B5/3909 ,  H01L43/12 ,  Y10T428/1114

摘要： The organic spin transport device, such as a magnetic tunnel junction or a transistor, includes at least two ferromagnetic material electrodes. At least one organic semiconductor structure is formed between the at least two ferromagnetic material electrodes. At least one buffer layer is positioned between the at least one organic semiconductor structure and the at least two ferromagnetic material electrodes. The at least one buffer layer reduces spin scattering between the at least two ferromagnetic material electrodes and the at least one organic semiconductor structure. The device exhibits a magnetoresistive effect that depends on the relative magnetization of the two ferromagnetic material electrodes.

摘要翻译： 诸如磁性隧道结或晶体管的有机自旋传输器件包括至少两个铁磁材料电极。 在至少两个铁磁材料电极之间形成至少一个有机半导体结构。 至少一个缓冲层位于至少一个有机半导体结构和至少两个铁磁材料电极之间。 所述至少一个缓冲层减少所述至少两个铁磁材料电极与所述至少一个有机半导体结构之间的旋转散射。 该器件具有取决于两个铁磁材料电极的相对磁化强度的磁阻效应。

公开(公告)号：US06653888B2

公开(公告)日：2003-11-25

申请号：US10043999

申请日：2001-10-23

申请人： Joo Sang Lee

发明人： Joo Sang Lee

IPC分类号： G05F302

CPC分类号： H02M3/073 ,  H02M2001/0032 ,  Y02B70/16

摘要： The present invention discloses an internal power voltage generator of a semiconductor device which can actively control standby tape pumps and active tape pumps according to a magnitude of an internal power voltage. The internal power voltage generator of the semiconductor device include: an internal power voltage generating unit composed of a base voltage generating unit having a plurality of base voltage pumps, and generating an internal base voltage from an external power voltage according to a first control signal, and a high voltage generating unit having a plurality of high voltage pumps, and generating an internal high voltage from the external power voltage according to a second control signal; and a control unit for generating the first control signal for controlling a number of the pumps of the base voltage generating unit and the second control signal for controlling a number of the pumps of the high voltage generating unit according to a magnitude of an internal power voltage consumed in the operation of the semiconductor device.

公开(公告)号：US06529419B2

公开(公告)日：2003-03-04

申请号：US10028431

申请日：2001-12-28

申请人： Joo Sang Lee

发明人： Joo Sang Lee

IPC分类号： G11C1604

CPC分类号： G11C7/1051 ,  G11C7/1045 ,  G11C7/1048

摘要： An apparatus for varying a data input/output path in a memory device, includes DBSAs amplifying a signal loaded on a data bus, fuse circuits producing output signals of specific levels respectively in accordance with whether or not fuses are cut, input multiplexers each of which selects either an external signal inputted through a corresponding pad or another external signal inputted through a pad next to the corresponding pad in accordance with the output signals of the fuse circuits, and applies the selected signal to a write driver, and data input/output parts including output multiplexers, each of the output multiplexers selecting a signal outputted from either a corresponding one of the DBSAs or one next to the corresponding DBSA in accordance with the output signals of the fuse circuits, and outputting the selected signal through a corresponding pad.

公开(公告)号：US6111798A

公开(公告)日：2000-08-29

申请号：US247523

申请日：1999-02-10

申请人： Joo Sang Lee

发明人： Joo Sang Lee

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C29/785 ,  G11C29/80

摘要： A fuse repair circuit for a semiconductor memory device includes a cell array provided with a row redundancy and a column redundancy and a fuse block for driving the row redundancy during a RAS cycle and driving the column redundancy during a CAS cycle, wherein the fuse block consists of an address input unit for selectively outputting a row address or a column address in accordance with switching signals, a plurality of fuse units, wherein redundancy information of a defective cell is programmed, for comparing an inputted address with the programmed redundancy information, and a redundancy driving unit for outputting a matching signal for driving the row redundancy or the column redundancy when the inputted address and the programmed redundancy information are identical.

摘要翻译： 一种用于半导体存储器件的保险丝修复电路包括具有行冗余和列冗余的单元阵列和用于在RAS周期期间驱动行冗余的熔丝块，并且在CAS周期期间驱动列冗余，其中熔丝块组成 一个地址输入单元，用于根据切换信号选择性地输出行地址或列地址;多个保险丝单元，其中对缺陷单元的冗余信息进行编程，用于将输入的地址与编程的冗余信息进行比较;以及 冗余驱动单元，用于当输入的地址和编程的冗余信息相同时，输出用于驱动行冗余或列冗余的匹配信号。

公开(公告)号：US06570808B2

公开(公告)日：2003-05-27

申请号：US10028672

申请日：2001-12-28

申请人： Joo Sang Lee

发明人： Joo Sang Lee

IPC分类号： G11C700

CPC分类号： G11C29/88 ,  G11C8/12 ,  G11C29/883

摘要： An apparatus for selecting banks in a semiconductor memory device provides a half-chip by adjusting all bits including the most significant bit (MSB) of bank addresses to select normal banks even if degraded banks are included in both upper and lower bank blocks. In a memory including an upper bank block and a lower bank block which are constructed with a plurality of banks selectable by a plurality of bank addresses, an apparatus for selecting the banks includes a plurality of bank address control parts each corresponding to one address bit of the bank addresses, each of the bank address control part applying a fixed logic value to the upper and lower bank blocks according to a selective cutting of at least one of the fuses, and each of the bank address control parts applying either a corresponding bank address bit input thereto or a bank address bit just below the corresponding bank address bit to the upper and lower bank blocks.