公开(公告)号：US20200266169A1

公开(公告)日：2020-08-20

申请号：US16782882

申请日：2020-02-05

Applicant: Tokyo Electron Limited

Inventor： Hoyoung KANG ,  Lars LIEBMANN ,  Jeffrey SMITH ,  Anton DEVILLIERS ,  Daniel CHANEMOUGAME

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/321 ,  H01L21/308

Abstract: Aspects of the disclosure provide a method for fabricating a semiconductor device. The method includes forming dummy power rails on a substrate by accessing from a first side of the substrate that is opposite to a second side of the substrate. Further, the method includes forming transistor devices and first wiring layers on the substrate by accessing the first side of the substrate. The dummy power rails are positioned below a level of the transistor devices on the first side of the substrate. Then, the method includes replacing the dummy power rails with conductive power rails by accessing from the second side of the substrate that is opposite to the first side of the substrate.

公开(公告)号：US20250132180A1

公开(公告)日：2025-04-24

申请号：US18621827

申请日：2024-03-29

Applicant: Tokyo Electron Limited

Inventor： Hoyoung KANG

IPC: H01L21/67 ,  G01B11/25

Abstract: Aspects of the present disclosure provide a metrology system for measuring wafer bow of a wafer. For example, the metrology system can include a wafer support configured to position a wafer for wafer bow measurement, a first light source configured to illuminate a first side of the wafer during the wafer bow measurement, and a first pinhole mask disposed between the first light source and the wafer support. The first pinhole mask can include a plurality of first pinholes that are arranged to pass first light from the first light source and project onto the first side of the wafer a plurality of first dots that correspond to the first pinholes in the first pinhole mask. The metrology system can also include a first camera arranged to capture an image of the first dots from the first side of the wafer during the wafer bow measurement.

公开(公告)号：US20180025899A1

公开(公告)日：2018-01-25

申请号：US15650352

申请日：2017-07-14

Applicant: Tokyo Electron Limited

Inventor： Hoyoung KANG

IPC: H01L21/02 ,  H01L21/687 ,  H01L21/66 ,  H01L21/306

Abstract: A processing chamber system includes a substrate mounting module configured to secure a substrate within a first processing chamber. The system also includes a first deposition module configured to apply a light-sensitive film to a front side surface of the substrate, and a second deposition module configured to apply a film layer to a backside surface of the substrate. The front side surface is opposite to the backside surface of the substrate. A substrate has a bare backside surface with a first coefficient of friction. A film layer is formed onto the backside surface of the substrate. The film layer formed on the backside surface of the substrate has a second coefficient of friction. The second coefficient of friction is lower than the first coefficient of friction.