摘要:
A projector screen is shown comprising one or more markers arranged to be used by projection processing circuitry to calculate a user perceived distortion in an image to be projected on the projector screen. A related method, computer program and projection processing circuitry are also shown.
摘要:
A projector screen includes one or more markers that are configured to be usable by projection processing circuitry in order to calculate a user perceived distortion in an image to be projected on the projector screen.
摘要:
A current video block of a frame to be encoded comprises a set of first data values, and at least one other video block of another frame comprises a set of second data values. Data value pairs are formed of data values from said set of first data values and equal number of corresponding data values from said set of second data values. A combined comparison value is formed by defining comparison values, each of which is defined by using data values of one data value pair of said data value pairs. Said data value pairs are divided into at least two sub-sets of data value pairs each sub-set comprising equal number of data value pairs. The calculation of the comparison values is interlaced such that the calculation of comparison values of one sub-set of data value pairs is initiated in a time after initiating and before completing the calculation of comparison values of another sub-set of data value pairs.
摘要:
A current video block of a frame to be encoded comprises a set of first data values, and at least one other video block of another frame comprises a set of second data values. Data value pairs are formed of data values from said set of first data values and equal number of corresponding data values from said set of second data values. A combined comparison value is formed by defining comparison values, each of which is defined by using data values of one data value pair of said data value pairs. Said data value pairs are divided into at least two sub-sets of data value pairs each sub-set comprising equal number of data value pairs. The calculation of the comparison values is interlaced such that the calculation of comparison values of one sub-set of data value pairs is initiated in a time after initiating and before completing the calculation of comparison values of another sub-set of data value pairs.
摘要:
A current video block of a frame to be encoded comprises a set of first data values, and at least one other video block of another frame comprises a set of second data values. Data value pairs are formed of data values from said set of first data values and equal number of corresponding data values from said set of second data values. A combined comparison value is formed by defining comparison values, each of which is defined by using data values of one data value pair of said data value pairs. Said data value pairs are divided into at least two sub-sets of data value pairs each sub-set comprising equal number of data value pairs. The calculation of the comparison values is interlaced such that the calculation of comparison values of one sub-set of data value pairs is initiated in a time after initiating and before completing the calculation of comparison values of another sub-set of data value pairs.
摘要:
In a method for performing a multiplication operation between a first operand and a second operand the multiplication operation is divided into at least two suboperations. At least one of the suboperations is performed in a time-interlaced manner, wherein the at least one suboperation is further divided into partial suboperations so that each partial suboperation is initiated at a different time.
摘要:
An instruction word is used to transfer information about whether the instruction word pertains to mode setting of a functional block. Instruction words included in the program code are processed in at least a first decoding step and a second decoding step, wherein in the first decoding step, said information included in the instruction word is examined. On the basis of the examination, it is determined whether the mode of one or more functional blocks is to be set or whether the second decoding step is to be taken, in which the instruction word is decoded to be run by one or more of said functional blocks. The invention also relates to a processor and an electronic device, in which the method can be implemented. The invention further relates to a program, in which a program code is provided for implementing the method.
摘要:
The invention relates to memory processing in a microprocessor. The microprocessor comprises a memory indicated by means of alignment boundaries for storing data, at least one register for storing data used during calculation, memory addressing means for indicating the memory by means of the alignment boundaries and for transferring data between the memory and the register, and a hardware shift register, which can be shifted with the accuracy of one bit, and which comprises a data loading zone and a guard zone. The memory addressing means transfer data including a memory addressing which cannot be fitted into the alignment boundary between the memory and the register through the data loading zone in the hardware shift register, and the hardware shift register is arranged to process data using shifts and utilizing the guard zone.
摘要:
The present invention relates to a method for performing calculation operations using a pipelined calculation device comprising a group of at least two pipeline stages. The pipeline stages comprise at least one data interface for input of data and at least one data interface for output of data. In the method, data for performing calculation operations is input to the device. Selective data processing is performed in the calculation device, wherein between at least one input data interface and at least one output data interface a selection is performed to connect at least one input data interface to at least one output data interface for routing data between at least one input data interface and at least one output data interface and for processing data according to the selection. The invention further relates to a system and a device in which the method is utilized.
摘要:
A method for performing calculation operations uses a pipelined calculation device comprising a group of at least two pipeline stages, at least one data interface for input of data, and at least one data interface for output of data. The pipeline stages include at least one data interface for input of data and at least one data interface for output of data. Data for performing a first and a second calculation operation is input to the device. In the first calculation operation, output data of at least one pipeline stage is stored into a memory. In the second calculation operation the stored data is used as input data to a pipeline stage. The invention further relates to a system and a device, in which the method is utilized.