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公开(公告)号：US11150835B2
公开(公告)日：2021-10-19
申请号：US16928422
申请日：2020-07-14
发明人： Shinichi Kanno , Hideki Yoshida , Naoki Esaka , Hiroshi Nishimura
IPC分类号： G06F3/06 , G06F12/1009
摘要： According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
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公开(公告)号：US11042305B2
公开(公告)日：2021-06-22
申请号：US16004509
申请日：2018-06-11
发明人： Shinichi Kanno , Hideki Yoshida
摘要： According to one embodiment, a memory system manages wear of each of a plurality of blocks in a nonvolatile memory. The memory system receives, from a host, a write request including a parameter specifying a data retention term required for first data to be written. The memory system selects, from the blocks, a first block in which a data retention term estimated from the wear of the first block is longer than or equal to the specified data retention term. The memory system writes the first data to the first block.
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公开(公告)号：US10719437B2
公开(公告)日：2020-07-21
申请号：US15984944
申请日：2018-05-21
发明人： Hideki Yoshida , Shinichi Kanno
摘要： According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
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公开(公告)号：US20180285224A1
公开(公告)日：2018-10-04
申请号：US16000335
申请日：2018-06-05
发明人： Shinichi Kanno , Hideki Yoshida
摘要： According to one embodiment, a storage system includes a first storage including first nonvolatile memories storing data which is corrupted when data is read from the first nonvolatile memories, and a controller which controls the first storage. The controller reads data from a first nonvolatile memory at a first address, and determines that whether the read data is to be written back to the first storage or not.
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公开(公告)号：US09910602B2
公开(公告)日：2018-03-06
申请号：US15270197
申请日：2016-09-20
发明人： Hideki Yoshida , Tatsunori Kanai , Masaya Tarui , Yutaka Yamada
IPC分类号： G06F3/06 , G06F12/123 , G06F12/0808 , G06F12/06 , G06F12/08 , G06F12/1009 , G06F12/12 , G06F12/02 , G06F12/0811 , G11C7/10 , G06F12/0868
CPC分类号： G06F3/061 , G06F3/0652 , G06F3/0656 , G06F3/0688 , G06F12/0246 , G06F12/0638 , G06F12/08 , G06F12/0808 , G06F12/0811 , G06F12/0868 , G06F12/1009 , G06F12/12 , G06F12/123 , G06F2212/283 , G06F2212/651 , G06F2212/7201 , G06F2212/7208 , G11C7/1072
摘要： A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.
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公开(公告)号：US11144451B2
公开(公告)日：2021-10-12
申请号：US16723458
申请日：2019-12-20
发明人： Shinichi Kanno , Hideki Yoshida
摘要： According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.
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公开(公告)号：US11093137B2
公开(公告)日：2021-08-17
申请号：US16660870
申请日：2019-10-23
发明人： Hideki Yoshida , Shinichi Kanno
IPC分类号： G06F3/06 , G06F12/1009 , G06F12/02
摘要： According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.
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公开(公告)号：US11042331B2
公开(公告)日：2021-06-22
申请号：US16217867
申请日：2018-12-12
摘要： According to one embodiment, a memory device includes a first memory, a control circuit controlling the first memory, and a second memory storing a second program. The second program manages management information associated with the first memory, sends the management information conforming to a specific interface to a first program if a command conforming to the specific interface is an output command to output the management information. The second program receives first information conforming to the specific interface and issued by the first program, translates the first information into second information corresponding to the second program, translates the second information into third information corresponding to the control circuit, and executes processing for the first memory in accordance with the third information.
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公开(公告)号：US20200341681A1
公开(公告)日：2020-10-29
申请号：US16928422
申请日：2020-07-14
发明人： Shinichi KANNO , Hideki Yoshida , Naoki Esaka , Hiroshi Nishimura
IPC分类号： G06F3/06 , G06F12/1009
摘要： According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
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公开(公告)号：US20200310961A1
公开(公告)日：2020-10-01
申请号：US16899805
申请日：2020-06-12
发明人： Hideki Yoshida , Shinichi Kanno
摘要： According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
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