公开(公告)号：US20200235117A1

公开(公告)日：2020-07-23

申请号：US16536552

申请日：2019-08-09

Applicant: Toshiba Memory Corporation

Inventor： Kosuke HORIBE ,  Kei Watanabe ,  Toshiyuki Sasaki ,  Tomo Hasegawa ,  Soichi Yamazaki ,  Keisuke Kikutani ,  Jun Nishimura ,  Hisashi Harada ,  Hideyuki Kinoshita

IPC: H01L27/11578 ,  H01L27/11573 ,  H01L27/11565 ,  G11C16/04

Abstract: A semiconductor device of an embodiment includes a control circuit arranged on a substrate, a first conductive layer arranged on the control circuit and containing a first element as a main component, a multilayer structure arranged on the first conductive layer and configured such that multiple second conductive layers and multiple insulating layers are alternately stacked on each other, a memory layer penetrating the multilayer structure and reaching the first conductive layer at a bottom portion, a first layer arranged between the control circuit and the first conductive layer and containing the first element as a main component, and a second layer arranged between the control circuit and the first layer and containing, as a main component, a second element different from the first element.

公开(公告)号：US20180261466A1

公开(公告)日：2018-09-13

申请号：US15695918

申请日：2017-09-05

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Soichi YAMAZAKI ,  Kazuhito FURUMOTO ,  Kosuke HORIBE ,  Keisuke KIKUTANI ,  Atsuko SAKATA ,  Junichi WADA ,  Toshiyuki SASAKI

IPC: H01L21/311 ,  H01L21/033 ,  H01L21/3213

Abstract: A method of manufacturing a semiconductor device includes forming a mask layer including aluminum or an aluminum compound on a layer to be etched comprising at least one first metal selected from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium. The method of manufacturing a semiconductor device further includes patterning the mask layer, and etching the layer to be etched by using the patterned mask layer to form a hole or a groove in the layer to be etched.