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    Session information preserving system and method therefor
    3.
    发明申请
    Session information preserving system and method therefor 审中-公开
    会话信息保存系统及其方法

    公开(公告)号：US20050246288A1

    公开(公告)日：2005-11-03

    申请号：US11019413

    申请日：2004-12-20

    申请人： Daisuke Kimura ,  Mitsuhiko Yoshimura ,  Makoto Kitagawa

    发明人： Daisuke Kimura ,  Mitsuhiko Yoshimura ,  Makoto Kitagawa

    IPC分类号： G06F15/00 ,  G06F21/00 ,  H04K1/00

    CPC分类号： G06F21/31 ,  G06Q20/367

    摘要： A session-information preserving system includes a client to which business data are inputted and a server which processes the business data sent from the client computer. The system includes a login control component to execute a login procedure on the basis of user identification information necessary for logging in to said system; a maintenance management component to search a maintenance information table for maintenance information on said server; and a pane generator to generate data used to display a plurality of panes on the client, the pane data including the maintenance information that has been retrieved by the maintenance management component, the plurality of panes including first and second panes configured to be displayed on a display of the client to receive first information and second information, respectively, from the client that are to be stored in the server and a notification pane to display a notice relating to the maintenance information on the display of the client, the second information including a first portion and a second portion.

    摘要翻译： 会话信息保存系统包括输入业务数据的客户端和处理从客户端计算机发送的业务数据的服务器。 该系统包括登录控制组件，用于基于登录到所述系统所需的用户识别信息来执行登录过程; 维护管理部件，用于在维护信息表中搜索所述服务器上的维护信息; 以及窗格生成器，用于生成用于在所述客户端上显示多个窗格的数据，所述窗格数据包括由所述维护管理组件检索到的维护信息，所述多个窗格包括被配置为显示在所述维护管理组件上的第一和第二窗格 分别从客户端接收要存储在服务器中的客户端以接收第一信息和第二信息的通知窗格，以及在客户显示器上显示与维护信息有关的通知，第二信息包括 第一部分和第二部分。

    Memory device and method of reading memory device
    4.
    发明授权
    Memory device and method of reading memory device 失效
    存储器件和读取存储器件的方法

    公开(公告)号：US08379430B2

    公开(公告)日：2013-02-19

    申请号：US12923978

    申请日：2010-10-19

    申请人： Makoto Kitagawa ,  Tsunenori Shiimoto ,  Hiroshi Yoshihara

    发明人： Makoto Kitagawa ,  Tsunenori Shiimoto ,  Hiroshi Yoshihara

    IPC分类号： G11C11/00 ,  G11C7/02

    CPC分类号： G11C13/004 ,  G11C13/0007 ,  G11C13/0061 ,  G11C2013/0054 ,  G11C2213/11 ,  G11C2213/56 ,  G11C2213/79

    摘要： A memory device includes: a memory unit in which an electric charge discharging rate between two electrodes is different in accordance with logic of stored information; a sense amplifier that detects the logic of the information by comparing a discharge electric potential of a wiring to which one electrode of the memory unit is connected with a reference electric potential; and a replica circuit that has a replica unit emulating the memory unit and controls a sense timing of the sense amplifier in accordance with a discharge rate of the replica unit.

    摘要翻译： 存储装置包括：存储单元，其中两个电极之间的电荷放电速率根据所存储信息的逻辑而不同; 读出放大器，通过将存储单元的一个电极与其连接的布线的放电电位与参考电位进行比较来检测信息的逻辑; 以及复制电路，其具有仿真存储器单元的复制单元，并且根据复制单元的放电速率来控制读出放大器的感测时序。

    STORAGE APPARATUS AND OPERATION METHOD FOR OPERATING THE SAME
    5.
    发明申请
    STORAGE APPARATUS AND OPERATION METHOD FOR OPERATING THE SAME 有权
    存储装置和操作方法

    公开(公告)号：US20120218809A1

    公开(公告)日：2012-08-30

    申请号：US13397282

    申请日：2012-02-15

    申请人： Makoto Kitagawa ,  Tsunenori Shiimoto ,  Tomohito Tsushima

    发明人： Makoto Kitagawa ,  Tsunenori Shiimoto ,  Tomohito Tsushima

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2213/79

    摘要： A storage apparatus includes: a plurality of storage elements configured to have the resistance state thereof changed in accordance with an applied voltage; and a drive portion configured to perform a resistance change operation and a read operation, the resistance change operation involving writing or erasing information to or from the storage elements by changing the resistance state thereof, the read operation involving reading the information from the storage elements; wherein the drive portion includes an amplifier configured to output a read signal upon execution of the read operation, a constant current load, and a control portion configured to perform the resistance change operation and a direct verify operation on the storage elements, the direct verify operation involving carrying out, subsequent to the resistance change operation, the read operation for verifying whether the writing or erasing of the information to or from the storage elements has been normally accomplished.

    摘要翻译： 存储装置包括：多个存储元件，其被配置为根据施加的电压使其电阻状态发生变化; 以及驱动部，被配置为执行电阻变化操作和读取操作，所述电阻改变操作涉及通过改变其电阻状态来从存储元件写入或擦除信息，所述读取操作涉及从存储元件读取信息; 其特征在于，所述驱动部具有：放大器，被配置为在执行所述读取​​操作时输出读取信号;恒定电流负载;以及被配置为对所述存储元件执行电阻变化操作和直接验证操作的控制部，所述直接验证操作 涉及在电阻变化操作之后进行用于验证是否正常地完成对存储元件的写入或擦除信息的读取操作。

    RESISTANCE RANDOM ACCESS CHANGE MEMORY DEVICE
    7.
    发明申请
    RESISTANCE RANDOM ACCESS CHANGE MEMORY DEVICE 审中-公开
    电阻随机访问更改存储器件

    公开(公告)号：US20110305068A1

    公开(公告)日：2011-12-15

    申请号：US13116590

    申请日：2011-05-26

    申请人： Makoto Kitagawa ,  Tsunenori Shiimoto ,  Hiroshi Yoshihara

    发明人： Makoto Kitagawa ,  Tsunenori Shiimoto ,  Hiroshi Yoshihara

    IPC分类号： G11C11/00

    CPC分类号： H01L45/085 ,  G11C13/0026 ,  G11C13/0069 ,  G11C2213/79 ,  G11C2213/82 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/145

    摘要： A resistance random access change memory device includes: a memory cell array in which plural memory cells having current paths with series-connected access transistors and variable resistive elements are two-dimensionally arranged; plural bit lines that connect one ends of the current paths; plural source lines that connect the other ends of the current paths; and plural word lines that control conduction and non-conduction of the access transistors, wherein bit line contacts are shared between two memory cells to which the word lines are adjacently provided, and pairs of memory cells are formed, all of the pairs of memory cells connected to the adjacent two bit lines are connected to the corresponding source lines via individual source line contacts, and the source lines are formed by a wiring layer upper than that of the bit lines with a larger pitch than that of the bit lines.

    摘要翻译： 电阻随机存取改变存储器件包括：存储单元阵列，其中具有串联连接的存取晶体管和可变电阻元件的电流路径的多个存储单元被二维布置; 连接当前路径的一端的多个位线; 连接当前路径的另一端的多条源极线; 以及控制存取晶体管的导通和非导通的多个字线，其中位线接触在相邻设置有字线的两个存储单元之间共享，并且形成存储单元对，所有存储单元对 连接到相邻的两条位线通过各个源极线接触连接到相应的源极线，并且源极线由比位线的间距高于位线的布线层形成。

    Semiconductor memory device and its operation method
    8.
    发明申请
    Semiconductor memory device and its operation method 失效
    半导体存储器件及其操作方法

    公开(公告)号：US20110026332A1

    公开(公告)日：2011-02-03

    申请号：US12805089

    申请日：2010-07-12

    申请人： Makoto Kitagawa

    发明人： Makoto Kitagawa

    IPC分类号： G11C7/10

    CPC分类号： G11C7/12 ,  G11C7/08 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/009 ,  G11C2211/5642 ,  G11C2213/79

    摘要： Disclosed herein is a semiconductor memory device including: a bit line and a sense line; a data storage element having a data storage state changing in accordance with a voltage applied to the bit line; a first switch for controlling connection of the sense line to the bit line; a data latch circuit having a second data holding node and a first data holding node connected to the sense line; and a second switch for controlling connection of the second data holding node of the data latch circuit to the bit line.

    摘要翻译： 本文公开了一种半导体存储器件，包括：位线和感测线; 数据存储元件，其具有根据施加到所述位线的电压而改变的数据存储状态; 用于控制感测线与位线的连接的第一开关; 数据锁存电路，具有第二数据保持节点和连接到感测线的第一数据保持节点; 以及用于控制数据锁存电路的第二数据保持节点与位线的连接的第二开关。

    SYSTEM INFRASTRUCTURE STRUCTURE FORMULATION SUPPORTING SYSTEM AND SUPPORTING METHOD
    10.
    发明申请
    SYSTEM INFRASTRUCTURE STRUCTURE FORMULATION SUPPORTING SYSTEM AND SUPPORTING METHOD 审中-公开
    系统基础结构配置支持系统和支持方法

    公开(公告)号：US20080148220A1

    公开(公告)日：2008-06-19

    申请号：US11754453

    申请日：2007-05-29

    申请人： MASAYUKI TABARU ,  Tadashi Yamamitsu ,  Makoto Kitagawa ,  Eiji Takamatsu

    发明人： MASAYUKI TABARU ,  Tadashi Yamamitsu ,  Makoto Kitagawa ,  Eiji Takamatsu

    IPC分类号： G06F9/44

    CPC分类号： G06Q10/06 ,  G06F8/10

    摘要： A system infrastructure structure formulation supporting method in which based on quality requirements, formulated examples of system infrastructure structures up to the present are grouped into a database for storing the system infrastructure structures, then being stored into a group management area in advance. At the time of a new formulation, demands presented with an expression which user uses are accepted from an input/output terminal. Then, the demands are converted into quality requirements of the system by making reference to a demand-contents management table, a quality-requirement management table, and a demand-quality-requirement correspondence table stored in a reference information storage area. Next, using the quality requirements acquired, a group stored in the group management area is selected. Moreover, elements within the group are selected from a grouping table, then sequentially presenting the formulated examples having high degrees of similarity.

    摘要翻译： 一种基于质量要求的系统基础结构配置支持方法，将目前的系统基础设施结构的制定示例分组为用于存储系统基础设施结构的数据库，然后预先存储到组管理区域中。 在新制定时，从输入/输出终端接受用户使用的表达式的请求。 然后，通过参照存储在参考信息存储区域中的需求内容管理表，质量要求管理表和需求质量要求对应表，将需求转换为系统的质量要求。 接下来，使用获取的质量要求，选择存储在组管理区域中的组。 此外，组内的元素从分组表中选择，然后顺序呈现具有高度相似度的配制实施例。