摘要:
An estimation method of a predicted motion vector for an image block having one or more pixels, which includes calculating a pixel difference value corresponding to a current frame and a reference frame for each pixel of the image block, determining a pixel difference area according to the pixel difference values corresponding to the plurality of pixels, and determining a predicted motion vector according to the pixel difference area.
摘要:
A block matching method for estimating a motion vector of an estimation block of an image frame is provided, which includes comparing the estimation block with at least one reference block corresponding to a first object to obtain a plurality of pixel difference values, determining a mask area corresponding to the first object and a calculation area corresponding to a second object in the estimation block, and performing blocking matching operations on the calculation area to determine a motion vector of the second object as the motion vector of the estimation block.
摘要:
A block matching method for estimating a motion vector of an estimation block of an image frame is provided, which includes comparing the estimation block with at least one reference block corresponding to a first object to obtain a plurality of pixel difference values, determining a mask area corresponding to the first object and a calculation area corresponding to a second object in the estimation block, and performing blocking matching operations on the calculation area to determine a motion vector of the second object as the motion vector of the estimation block.
摘要:
An estimation method of a predicted motion vector for an image block having one or more pixels, which includes calculating a pixel difference value corresponding to a current frame and a reference frame for each pixel of the image block, determining a pixel difference area according to the pixel difference values corresponding to the plurality of pixels, and determining a predicted motion vector according to the pixel difference area.
摘要:
A motion estimation method is provided, which includes following steps: dividing a first frame to be estimated into a plurality of area units, in which each of the area units includes a plurality of blocks; and assigning a set of motion vector values to each of the area units, in which the set of motion vector values includes a plurality of predetermined motion vector values, and each of the predetermined motion vector values is assigned to at least one block in each of the area units.
摘要:
An image processing circuit and an image processing method are disclosed. The image processing circuit comprises a block matching unit, a multiplexer, an arbiter, and a motion compensation circuit. The block matching unit calculates an alternating current (AC) sum of absolute difference (SAD) and a direct current (DC) sum of absolute difference (SAD) according to a current block in a current image and a reference block in a reference image. The arbiter controls the multiplexer selectively to output the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image. The motion compensation circuit executes motion compensation according to the AC SAD or the DC SAD outputted by the multiplexer.
摘要:
A motion estimation method is provided, which includes following steps: dividing a first frame to be estimated into a plurality of area units, in which each of the area units includes a plurality of blocks; and assigning a set of motion vector values to each of the area units, in which the set of motion vector values includes a plurality of predetermined motion vector values, and each of the predetermined motion vector values is assigned to at least one block in each of the area units.
摘要:
An image processing circuit and an image processing method are disclosed. The image processing circuit comprises a block matching unit, a multiplexer, an arbiter, and a motion compensation circuit. The block matching unit calculates an alternating current (AC) sum of absolute difference (SAD) and a direct current (DC) sum of absolute difference (SAD) according to a current block in a current image and a reference block in a reference image. The arbiter controls the multiplexer selectively to output the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image. The motion compensation circuit executes motion compensation according to the AC SAD or the DC SAD outputted by the multiplexer.
摘要:
An output enable signal transformation device for a gate driver in an LCD device includes a reception terminal coupled to a timing generator of the LCD device for receiving an enable synchronization signal, an enable clock signal and a plurality of enable control signals generated by the timing generator, a shift register module coupled to the reception terminal for shifting the enable synchronization signal according to the enable clock signal, a multiplexer module coupled to the shift register module and the timing generator for generating a plurality of output enable signals according to the enable synchronization signal and the plurality of enable control signals, and an output terminal coupled to the multiplexer module and a logic circuit of the gate driver for outputting the plurality of output enable signals to the logic circuit.
摘要:
An LCD device includes an LCD panel, a timing controller, a plurality of gate drivers, and a plurality of source drivers. The timing controller generates a plurality of horizontal synchronization signals respectively corresponding to the plurality of source drivers based on the signal transmission paths between the plurality of source drivers and the timing controller. The timing controller generates a plurality of vertical synchronization signals respectively corresponding to the plurality of gate drivers based on the signal transmission paths between the plurality of gate drivers and the timing controller. Each source driver outputs a source driving signal based on a horizontal clock signal, a data signal, a horizontal control signal, and a corresponding horizontal synchronization signal. Each gate driver outputs a gate driving signal based on a vertical clock signal, a vertical control signal, and a corresponding vertical synchronization signal.