公开(公告)号：US6078060A

公开(公告)日：2000-06-20

申请号：US933817

申请日：1997-09-19

申请人： Tsukasa Shibuya ,  Atsushi Yoshinouchi ,  Hongyong Zhang ,  Nobuo Kubo

发明人： Tsukasa Shibuya ,  Atsushi Yoshinouchi ,  Hongyong Zhang ,  Nobuo Kubo

IPC分类号： H01L29/786 ,  G02F1/1362 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/01 ,  H01L29/04

CPC分类号： G02F1/13454 ,  H01L27/1214

摘要： The invention provides a peripheral drive circuit integrated active matrix LCD device in which thin-film transistors have different characteristics optimized for individual circuits of the active matrix LCD device. A pixel matrix portion includes thin-film transistors, each having offset gate regions 134 and 136 produced in a non-self-alignment manner, an n-channel driver portion includes thin-film transistors, each having lightly-doped regions 128 and 130 produced in a combination of the non-self-alignment manner and a self-alignment manner, and a p-channel driver portion includes thin-film transistors produced in a self-alignment manner. This construction makes it possible to arrange the thin-film transistors having characteristics required by the individual circuits.

摘要翻译： 本发明提供一种外围驱动电路集成有源矩阵LCD器件，其中薄膜晶体管具有针对有源矩阵LCD器件的各个电路优化的不同特性。 像素矩阵部分包括薄膜晶体管，每个薄膜晶体管具有以非自对准方式产生的偏移栅极区域134和136，n沟道驱动器部分包括薄膜晶体管，每个薄膜晶体管都具有产生的轻掺杂区域128和130 以非自对准方式和自对准方式的组合，并且p沟道驱动器部分包括以自对准方式制造的薄膜晶体管。 这种结构使得可以将具有各个电路所要求的特性的薄膜晶体管布置。

公开(公告)号：US5923961A

公开(公告)日：1999-07-13

申请号：US968025

申请日：1997-11-12

申请人： Tsukasa Shibuya ,  Atsushi Yoshinouchi ,  Hongyong Zhang ,  Akira Takenouchi

发明人： Tsukasa Shibuya ,  Atsushi Yoshinouchi ,  Hongyong Zhang ,  Akira Takenouchi

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L21/339

CPC分类号： G02F1/13454 ,  H01L27/1214

摘要： There is provided an active matrix type display in which thin film transistors having required characteristics are provided selectively in a pixel matrix portion and a peripheral driving circuit portion. In a structure having the pixel matrix portion and the peripheral driving circuit portion on the same substrate, N-channel type thin film transistors having source and drain regions formed through a non-self-alignment process and low concentrate impurity regions formed through a self-alignment process are formed in the pixel matrix portion and in an N-channel driver portion of the peripheral driving circuit portion. A P-channel type thin film transistor in which no low concentrate impurity region is formed and source and drain regions are formed only through the self-alignment process is formed in a P-channel driver portion of the peripheral driving circuit portion.

摘要翻译： 提供一种有源矩阵型显示器，其中具有所需特性的薄膜晶体管选择性地设置在像素矩阵部分和外围驱动电路部分中。 在具有同一衬底上的像素矩阵部分和外围驱动电路部分的结构中，通过非自对准工艺形成的源极和漏极区域和通过自对准工艺形成的低浓缩杂质区域的N沟道型薄膜晶体管， 在外围驱动电路部分的像素矩阵部分和N沟道驱动器部分中形成对准处理。 在周边驱动电路部分的P沟道驱动器部分中形成P型沟道型薄膜晶体管，其中不形成低浓度杂质区，而仅通过自对准工艺形成源极和漏极区。

公开(公告)号：US06172671B2

公开(公告)日：2001-01-09

申请号：US09325260

申请日：1999-06-03

申请人： Tsukasa Shibuya ,  Atsushi Yoshinouchi ,  Hongyong Zhang ,  Akira Takenouchi

发明人： Tsukasa Shibuya ,  Atsushi Yoshinouchi ,  Hongyong Zhang ,  Akira Takenouchi

IPC分类号： G09G500

CPC分类号： G02F1/13454 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288

摘要： There is provided an active matrix type display in which thin film transistors having required characteristics are provided selectively in a pixel matrix portion and a peripheral driving circuit portion. In a structure having the pixel matrix portion and the peripheral driving circuit portion on the same substrate, N-channel type thin film transistors having source and drain regions formed through a non-self-alignment process and low concentrate impurity regions formed through a self-alignment process are formed in the pixel matrix portion and in an N-channel driver portion of the peripheral driving circuit portion. A P-channel type thin film transistor in which no low concentrate impurity region is formed and source and drain regions are formed only through the self-alignment process is formed in a P-channel driver portion of the peripheral driving circuit portion.

摘要翻译： 提供一种有源矩阵型显示器，其中具有所需特性的薄膜晶体管选择性地设置在像素矩阵部分和外围驱动电路部分中。 在具有同一衬底上的像素矩阵部分和外围驱动电路部分的结构中，通过非自对准工艺形成的源极和漏极区域和通过自对准工艺形成的低浓缩杂质区域的N沟道型薄膜晶体管， 在外围驱动电路部分的像素矩阵部分和N沟道驱动器部分中形成对准处理。 在周边驱动电路部分的P沟道驱动器部分中形成P型沟道型薄膜晶体管，其中不形成低浓度杂质区，而仅通过自对准工艺形成源极和漏极区。

公开(公告)号：US5814835A

公开(公告)日：1998-09-29

申请号：US558501

申请日：1995-11-16

申请人： Naoki Makita ,  Tadayoshi Miyamoto ,  Tsukasa Shibuya ,  Masashi Maekawa

发明人： Naoki Makita ,  Tadayoshi Miyamoto ,  Tsukasa Shibuya ,  Masashi Maekawa

IPC分类号： H01L27/146 ,  H01L21/02 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L29/04

CPC分类号： H01L29/78654 ,  H01L21/2022 ,  H01L27/1214 ,  H01L29/66757

摘要： The semiconductor device of invention includes: a substrate having an insulating surface; and an element region formed by crystallizing an amorphous silicon film, the element region being provided on the insulating surface of the substrate. In the semiconductor device, the element region is constituted by a laterally crystallized region formed by crystallizing the amorphous silicon film from a linearly crystallized region crystallized by a selective introduction of catalyst elements for promoting a crystallization of the amorphous silicon film to a region surrounding the linearly crystallized region by performing a heat-treatment, and a concentration of the catalyst elements in at least one of the laterally crystallized region and the linearly crystallized region is controlled by a line width of an introduction setting region having a linear planar pattern, the line width being set so as to selectively introduce the catalyst elements.

摘要翻译： 本发明的半导体器件包括：具有绝缘表面的衬底; 以及通过使非晶硅膜结晶而形成的元件区域，所述元件区域设置在所述基板的绝缘表面上。 在半导体器件中，元件区域由通过选择性引入催化剂元素结晶的线性结晶区域使非晶硅膜结晶而形成的横向结晶区域，用于促进非晶硅膜的结晶化到线性区域 通过进行热处理的结晶化区域，并且横向结晶化区域和直线结晶化区域中的至少一个中的催化剂元素的浓度由具有线性平面图案的引入设定区域的线宽度，线宽度 被设定为选择性地引入催化剂元素。

公开(公告)号：US6013544A

公开(公告)日：2000-01-11

申请号：US610227

申请日：1996-03-04

申请人： Naoki Makita ,  Tadayoshi Miyamoto ,  Tsukasa Shibuya

发明人： Naoki Makita ,  Tadayoshi Miyamoto ,  Tsukasa Shibuya

IPC分类号： H01L21/205 ,  H01L21/20 ,  H01L21/268 ,  H01L21/336 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L21/02532 ,  H01L21/02422 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277

摘要： A method for fabricating a semiconductor device including an active region obtained by utilizing a silicon semiconductor film having crystallinity which is formed on an insulating substrate is disclosed. A crystalline silicon semiconductor film is obtained by introducing catalyst elements for promoting the crystallization into a lower amorphous silicon semiconductor film and then performing a heat treatment onto the lower amorphous silicon semiconductor film. Thereafter, an upper amorphous silicon semiconductor film is formed on the obtained lower crystalline silicon semiconductor film, which is subsequently subjected to a heat treatment so as to obtain an upper crystalline silicon semiconductor film. Then, the upper crystalline silicon semiconductor film is removed. By this process, the catalyst elements remaining in the lower crystalline silicon semiconductor film moves into the upper crystalline silicon semiconductor film. As a result, a concentration of the catalyst elements in the lower crystalline silicon semiconductor film is reduced.

摘要翻译： 公开了一种制造半导体器件的方法，该半导体器件包括通过利用形成在绝缘衬底上的具有结晶性的硅半导体膜而获得的有源区。 通过将用于促进结晶的催化剂元素引入到下部非晶硅半导体膜中，然后对下部非晶硅半导体膜进行热处理，获得结晶硅半导体膜。 此后，在所获得的下部结晶硅半导体膜上形成上部非晶硅半导体膜，随后对其进行热处理，以获得上部结晶硅半导体膜。 然后，除去上部晶体硅半导体膜。 通过该工艺，残留在下结晶硅半导体膜中的催化剂元素移动到上结晶硅半导体膜中。 结果，下层结晶硅半导体膜中的催化剂元素的浓度降低。

公开(公告)号：US5818068A

公开(公告)日：1998-10-06

申请号：US531626

申请日：1995-09-21

申请人： Osamu Sasaki ,  Manabu Matsuura ,  Tsukasa Shibuya ,  Yasushi Kubota

发明人： Osamu Sasaki ,  Manabu Matsuura ,  Tsukasa Shibuya ,  Yasushi Kubota

IPC分类号： H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04

CPC分类号： H01L27/1214

摘要： A TFT circuit according to the present invention includes a first transistor and a second transistor both formed on an insulating substrate. The first transistor has a channel region comprising a polycrystalline silicon film to which a metal element for enhancing crystallization is added. The second transistor has a channel region comprising a polycrystalline silicon film to which no metal element for enhancing crystallization is added.

摘要翻译： 根据本发明的TFT电路包括形成在绝缘基板上的第一晶体管和第二晶体管。 第一晶体管具有包括多晶硅膜的沟道区，添加用于增强结晶的金属元素。 第二晶体管具有包括不添加用于增强结晶的金属元素的多晶硅膜的沟道区。

公开(公告)号：US5624861A

公开(公告)日：1997-04-29

申请号：US681512

申请日：1996-07-23

申请人： Tsukasa Shibuya

发明人： Tsukasa Shibuya

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L21/86 ,  H01L21/786

CPC分类号： H01L27/1214 ,  Y10S438/911

摘要： A manufacturing method of a semiconductor device includes the steps of depositing a metallic film (light-shielding film), an insulating film and a semiconductor film in this order on an insulating substrate, and after patterning the insulating film and the semiconductor film in a predetermined shape, oxidizing an exposed region of the metallic film using the insulating film and the semiconductor film as a mask. As a result, the light-shielding film composed of the metallic film is formed so as to cover the semiconductor film to block light from an external portion. The manufacturing method permits a process of forming a resist pattern for use in forming the light-shielding film and a process of etching the light-shielding film to be omitted, thereby reducing the required number of processes. Moreover, as a level difference is not generated around the light-shielding film, a generation of a level difference on the semiconductor film can be prevented. Furthermore, as the light-shielding film can be formed completely overlapped with the semiconductor film, a reduction in a display region of the semiconductor device can be avoided, thereby improving an aperture ratio.

摘要翻译： 半导体器件的制造方法包括以下步骤：在绝缘基板上依次沉积金属膜（遮光膜），绝缘膜和半导体膜，并且在预定的绝缘膜和半导体膜图案化之后 使用绝缘膜和半导体膜作为掩模来氧化金属膜的暴露区域。 结果，由金属膜构成的遮光膜形成为覆盖半导体膜以阻挡来自外部的光。 制造方法允许形成用于形成遮光膜的抗蚀剂图案的处理和要被省略的蚀刻光屏蔽膜的工艺，从而减少所需的处理次数。 此外，由于在遮光膜周围不产生电平差，因此可以防止在半导体膜上产生电平差。 此外，由于遮光膜可以与半导体膜完全重叠，所以可以避免半导体器件的显示区域的减少，从而提高孔径比。