公开(公告)号：US20120181653A1

公开(公告)日：2012-07-19

申请号：US13005754

申请日：2011-01-13

申请人： TSUNG-YI HUANG ,  Hung-Der Su ,  Kuo-Cheng Chang ,  Chun-Yi Hung ,  Kuo-Hsuan Lo ,  Jeng Gong

发明人： TSUNG-YI HUANG ,  Hung-Der Su ,  Kuo-Cheng Chang ,  Chun-Yi Hung ,  Kuo-Hsuan Lo ,  Jeng Gong

IPC分类号： H01L29/06 ,  H01L21/04

CPC分类号： H01L29/0688 ,  H01L29/0634 ,  H01L29/0692

摘要： The present invention discloses a semiconductor PN junction structure and a manufacturing method thereof. From top view, the PN junction includes a staggered comb-teeth structure. The PN junction forms a depletion region with enhanced breakdown voltage, hence broadening the applications of a semiconductor device having such PN junction.

摘要翻译： 本发明公开了一种半导体PN结结构及其制造方法。 从顶视图，PN结包括交错的梳齿结构。 PN结形成具有增强的击穿电压的耗尽区，因此拓宽了具有这种PN结的半导体器件的应用。

公开(公告)号：US20140045313A1

公开(公告)日：2014-02-13

申请号：US14055622

申请日：2013-10-16

申请人： Tsung-Yi Huang ,  Kuo-Hsuan Lo

发明人： Tsung-Yi Huang ,  Kuo-Hsuan Lo

IPC分类号： H01L29/66

CPC分类号： H01L29/66681 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/7835

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate in which isolation regions are formed for defining a device region; agate formed on the first conductive type substrate; a source and a drain formed in the device region and located at both sides of the gate respectively, and doped with second conductive type impurities; a second conductive type well, which is formed in the first conductive type substrate, and surrounds the drain from top view; and a first deep trench isolation structure, which is formed in the first conductive type substrate, and is located in the second conductive type well between the source and the drain from top view, wherein the depth of the first deep trench isolation structure is deeper than the second conductive type well from the cross-sectional view.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高压器件包括：第一导电型衬底，其中形成隔离区以限定器件区域; 形成在第一导电类型衬底上的玛瑙; 在器件区域中分别形成并位于栅极两侧的源极和漏极，并掺杂有第二导电类型杂质; 第二导电型阱，其形成在第一导电类型基板中，并且从俯视图围绕漏极; 以及第一深沟槽隔离结构，其形成在第一导电类型基板中，并且从顶视图位于源极和漏极之间的第二导电类型阱中，其中第一深沟槽隔离结构的深度比 第二导电类型井从横截面图。

公开(公告)号：US20120223384A1

公开(公告)日：2012-09-06

申请号：US13037678

申请日：2011-03-01

申请人： TSUNG-YI HUANG ,  Kuo-Hsuan Lo

发明人： TSUNG-YI HUANG ,  Kuo-Hsuan Lo

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66681 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/7835

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate in which isolation regions are formed for defining a device region; a gate formed on the first conductive type substrate; a source and a drain formed in the device region and located at both sides of the gate respectively, and doped with second conductive type impurities; a second conductive type well, which is formed in the first conductive type substrate, and surrounds the drain from top view; and a first deep trench isolation structure, which is formed in the first conductive type substrate, and is located in the second conductive type well between the source and the drain from top view, wherein the depth of the first deep trench isolation structure is deeper than the second conductive type well from the cross-sectional view.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高压器件包括：第一导电型衬底，其中形成隔离区以限定器件区域; 形成在所述第一导电型基板上的栅极; 在器件区域中分别形成并位于栅极两侧的源极和漏极，并掺杂有第二导电类型杂质; 第二导电型阱，其形成在第一导电类型基板中，并且从俯视图围绕漏极; 以及第一深沟槽隔离结构，其形成在第一导电类型基板中，并且从顶视图位于源极和漏极之间的第二导电类型阱中，其中第一深沟槽隔离结构的深度比 第二导电类型井从横截面图。

公开(公告)号：US09257421B2

公开(公告)日：2016-02-09

申请号：US14728189

申请日：2015-06-02

申请人： Tsung-Yi Huang ,  Kuo-Hsuan Lo ,  Wu-Te Weng

发明人： Tsung-Yi Huang ,  Kuo-Hsuan Lo ,  Wu-Te Weng

IPC分类号： H01L29/66 ,  H01L27/02 ,  H01L29/866 ,  H01L21/762

CPC分类号： H01L27/0255 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/66106 ,  H01L29/66136 ,  H01L29/861 ,  H01L29/866

摘要： The present invention discloses a transient voltage suppression (TVS) device and a manufacturing method thereof. The TVS device limits a voltage drop between two terminals thereof not to exceed a clamp voltage. The TVS device is formed in a stack substrate including a semiconductor substrate, a P-type first epitaxial layer, and a second epitaxial layer stacked in sequence. In the TVS device, a first PN diode is connected to a Zener diode in series, wherein the series circuit is surrounded by a first shallow trench isolation (STI) region; and a second PN diode is connected in parallel to the series circuit, wherein the second PN diode is surrounded by a second STI region. The first STI region and the second STI region both extend from an upper surface to the second epitaxial layer, but not to the first epitaxial layer.

摘要翻译： 本发明公开了一种瞬态电压抑制（TVS）装置及其制造方法。 TVS器件限制其两个端子之间的电压降不超过钳位电压。 TVS器件形成在堆叠衬底中，该衬底包括依次层叠的半导体衬底，P型第一外延层和第二外延层。 在TVS器件中，第一PN二极管串联连接到齐纳二极管，其中串联电路由第一浅沟槽隔离（STI）区域包围; 并且第二PN二极管与串联电路并联连接，其中第二PN二极管被第二STI区域包围。 第一STI区域和第​​二STI区域都从上表面延伸到第二外延层，而不是延伸到第一外延层。

公开(公告)号：US20150364460A1

公开(公告)日：2015-12-17

申请号：US14728189

申请日：2015-06-02

申请人： Tsung-Yi Huang ,  Kuo-Hsuan Lo ,  Wu-Te Weng

发明人： Tsung-Yi Huang ,  Kuo-Hsuan Lo ,  Wu-Te Weng

IPC分类号： H01L27/02 ,  H01L29/66 ,  H01L21/762 ,  H01L29/866

CPC分类号： H01L27/0255 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/66106 ,  H01L29/66136 ,  H01L29/861 ,  H01L29/866

摘要： The present invention discloses a transient voltage suppression (TVS) device and a manufacturing method thereof. The TVS device limits a voltage drop between two terminals thereof not to exceed a clamp voltage. The TVS device is formed in a stack substrate including a semiconductor substrate, a P-type first epitaxial layer, and a second epitaxial layer stacked in sequence. In the TVS device, a first PN diode is connected to a Zener diode in series, wherein the series circuit is surrounded by a first shallow trench isolation (STI) region; and a second PN diode is connected in parallel to the series circuit, wherein the second PN diode is surrounded by a second STI region. The first STI region and the second STI region both extend from an upper surface to the second epitaxial layer, but not to the first epitaxial layer.

摘要翻译： 本发明公开了一种瞬态电压抑制（TVS）装置及其制造方法。 TVS器件限制其两个端子之间的电压降不超过钳位电压。 TVS器件形成在堆叠衬底中，该衬底包括依次层叠的半导体衬底，P型第一外延层和第二外延层。 在TVS器件中，第一PN二极管串联连接到齐纳二极管，其中串联电路由第一浅沟槽隔离（STI）区域包围; 并且第二PN二极管与串联电路并联连接，其中第二PN二极管被第二STI区域包围。 第一STI区域和第​​二STI区域都从上表面延伸到第二外延层，而不是延伸到第一外延层。

公开(公告)号：US09105656B2

公开(公告)日：2015-08-11

申请号：US14055622

申请日：2013-10-16

申请人： Tsung-Yi Huang ,  Kuo-Hsuan Lo

发明人： Tsung-Yi Huang ,  Kuo-Hsuan Lo

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L21/337 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423

CPC分类号： H01L29/66681 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/7835

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate in which isolation regions are formed for defining a device region; agate formed on the first conductive type substrate; a source and a drain formed in the device region and located at both sides of the gate respectively, and doped with second conductive type impurities; a second conductive type well, which is formed in the first conductive type substrate, and surrounds the drain from top view; and a first deep trench isolation structure, which is formed in the first conductive type substrate, and is located in the second conductive type well between the source and the drain from top view, wherein the depth of the first deep trench isolation structure is deeper than the second conductive type well from the cross-sectional view.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高压器件包括：第一导电型衬底，其中形成隔离区以限定器件区域; 形成在第一导电类型衬底上的玛瑙; 在器件区域中分别形成并位于栅极两侧的源极和漏极，并掺杂有第二导电类型杂质; 第二导电型阱，其形成在第一导电类型基板中，并且从俯视图围绕漏极; 以及第一深沟槽隔离结构，其形成在第一导电类型基板中，并且从顶视图位于源极和漏极之间的第二导电类型阱中，其中第一深沟槽隔离结构的深度比 第二导电类型井从横截面图。

公开(公告)号：US08643136B2

公开(公告)日：2014-02-04

申请号：US13037678

申请日：2011-03-01

申请人： Tsung-Yi Huang ,  Kuo-Hsuan Lo

发明人： Tsung-Yi Huang ,  Kuo-Hsuan Lo

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L21/02

CPC分类号： H01L29/66681 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/7835

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate in which isolation regions are formed for defining a device region; a gate formed on the first conductive type substrate; a source and a drain formed in the device region and located at both sides of the gate respectively, and doped with second conductive type impurities; a second conductive type well, which is formed in the first conductive type substrate, and surrounds the drain from top view; and a first deep trench isolation structure, which is formed in the first conductive type substrate, and is located in the second conductive type well between the source and the drain from top view, wherein the depth of the first deep trench isolation structure is deeper than the second conductive type well from the cross-sectional view.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高压器件包括：第一导电型衬底，其中形成隔离区以限定器件区域; 形成在所述第一导电型基板上的栅极; 在器件区域中分别形成并位于栅极两侧的源极和漏极，并掺杂有第二导电类型杂质; 第二导电型阱，其形成在第一导电类型基板中，并且从俯视图围绕漏极; 以及第一深沟槽隔离结构，其形成在第一导电类型基板中，并且从顶视图位于源极和漏极之间的第二导电类型阱中，其中第一深沟槽隔离结构的深度比 第二导电类型井从横截面图。