公开(公告)号：US08818005B2

公开(公告)日：2014-08-26

申请号：US13109440

申请日：2011-05-17

申请人： Tyler Daigle ,  Julie Stultz

发明人： Tyler Daigle ,  Julie Stultz

IPC分类号： H02B1/00

CPC分类号： H03K19/00346 ,  Y10T307/74 ,  Y10T307/747 ,  Y10T307/826 ,  Y10T307/832 ,  Y10T307/858 ,  Y10T307/865

摘要： A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.

摘要翻译： 提供一种开关控制器，其使用一个或多个电容器来产生缓慢的导通/慢关断开关控制信号，以抑制音频开关中的可听见的开关噪声。 在一些实施例中，使用模拟反相器和电容器来产生开关控制信号，而在其它实施例中，使用两个电容器来产生开关控制信号。 为了节省开关状态之间的功率，提供了将开关控制信号连接到各个电压轨并禁用开关控制器的选定部分的布线逻辑。

公开(公告)号：US20120293227A1

公开(公告)日：2012-11-22

申请号：US13109440

申请日：2011-05-17

申请人： Tyler Daigle ,  Julie Stultz

发明人： Tyler Daigle ,  Julie Stultz

IPC分类号： H03L5/00

CPC分类号： H03K19/00346 ,  Y10T307/74 ,  Y10T307/747 ,  Y10T307/826 ,  Y10T307/832 ,  Y10T307/858 ,  Y10T307/865

摘要： A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.

摘要翻译： 提供一种开关控制器，其使用一个或多个电容器来产生缓慢的导通/慢关断开关控制信号，以抑制音频开关中的可听见的开关噪声。 在一些实施例中，使用模拟反相器和电容器来产生开关控制信号，而在其它实施例中，使用两个电容器来产生开关控制信号。 为了节省开关状态之间的功率，提供了将开关控制信号连接到各个电压轨并禁用开关控制器的选定部分的布线逻辑。

公开(公告)号：US20100060337A1

公开(公告)日：2010-03-11

申请号：US12205178

申请日：2008-09-05

申请人： Hrvoje Jasa ,  Steven M. Macaluso ,  Julie Stultz ,  Roy L. Yarbrough

发明人： Hrvoje Jasa ,  Steven M. Macaluso ,  Julie Stultz ,  Roy L. Yarbrough

IPC分类号： H03L5/00

CPC分类号： H03K3/356182

摘要： A circuit is described that when the power supply to circuits that control a pass transistor is at zero volts, the pass transistor configured as a voltage level translator remains off regardless of the voltages and changes in voltages at the ports connected to the pass transistor. Cross coupled transistors provide a mechanism where the higher of the port voltages is available to power circuitry that maintains the control input of the pass transistor in the off condition. The voltages at the ports may rise and fall relative to each other, but the control input of the pass transistor will keep the pass transistor off.

摘要翻译： 描述了一种电路，当控制通过晶体管的电路的电源为零电压时，配置为电压电平转换器的通过晶体管将保持关断，而不管连接到传输晶体管的端口处的电压和电压变化。 交叉耦合晶体管提供了一种机制，其中较高的端口电压可用于将通态晶体管的控制输入保持在关闭状态的电源电路。 端口处的电压可以相对于彼此上升和下降，但是传输晶体管的控制输入将保持传输晶体管关闭。

公开(公告)号：US07893566B2

公开(公告)日：2011-02-22

申请号：US12403490

申请日：2009-03-13

申请人： Roy L. Yarbrough ,  Julie Stultz ,  Steven M. Macaluso

发明人： Roy L. Yarbrough ,  Julie Stultz ,  Steven M. Macaluso

IPC分类号： H02J1/00

CPC分类号： H03K3/356 ,  Y10T307/615 ,  Y10T307/696 ,  Y10T307/76 ,  Y10T307/858

摘要： A circuit that automatically, seamlessly connects the higher (or the lower) of two power supplies to an output is described. The circuit does not incur a one diode drop when the two power supplies are at about the same voltage levels, and the unused power supply draws no stand-by current. Cross coupled transistor and cross coupled inverters are employed.

摘要翻译： 描述了自动地将两个电源的较高（或更低）连接到输出的电路。 当两个电源处于大致相同的电压电平时，该电路不会产生一个二极管降压，而未使用的电源不会产生待机电流。 采用交叉耦合晶体管和交叉耦合的反相器。

公开(公告)号：US07782116B2

公开(公告)日：2010-08-24

申请号：US12205178

申请日：2008-09-05

申请人： Hrvoje Jasa ,  Steven M. Macaluso ,  Julie Stultz ,  Roy L. Yarbrough

发明人： Hrvoje Jasa ,  Steven M. Macaluso ,  Julie Stultz ,  Roy L. Yarbrough

IPC分类号： H03K17/16

CPC分类号： H03K3/356182

摘要： A circuit is described that when the power supply to circuits that control a pass transistor is at zero volts, the pass transistor configured as a voltage level translator remains off regardless of the voltages and changes in voltages at the ports connected to the pass transistor. Cross coupled transistors provide a mechanism where the higher of the port voltages is available to power circuitry that maintains the control input of the pass transistor in the off condition. The voltages at the ports may rise and fall relative to each other, but the control input of the pass transistor will keep the pass transistor off.

摘要翻译： 描述了一种电路，当控制通过晶体管的电路的电源为零电压时，配置为电压电平转换器的通过晶体管将保持关断，而不管连接到传输晶体管的端口处的电压和电压变化。 交叉耦合晶体管提供了一种机制，其中较高的端口电压可用于将通态晶体管的控制输入保持在关闭状态的电源电路。 端口处的电压可以相对于彼此上升和下降，但是传输晶体管的控制输入将保持传输晶体管关闭。

公开(公告)号：US20100156521A1

公开(公告)日：2010-06-24

申请号：US12337709

申请日：2008-12-18

申请人： Julie Stultz ,  Steven M. Macaluso

发明人： Julie Stultz ,  Steven M. Macaluso

IPC分类号： G05F3/02

CPC分类号： H03K17/145 ,  H03K17/063 ,  H03K17/6877

摘要： A MOSFET switch is disclosed that is driven on by a circuit that provides a constant gate to source voltage, Vgs, that is independent of the input voltage, the power supply and any logic signals. The constant Vgs is derived from a reference voltage and biases the MOSFET switch such that Ron is constant, or Rflatness is minimized. A minimized Rflatness provides a higher fidelity transfer of audio signals compared to prior art switches where Rflatness is greater.

摘要翻译： 公开了一种MOSFET开关，其由提供恒定的栅极至源极电压Vgs的电路驱动，Vgs与输入电压，电源和任何逻辑信号无关。 常数Vgs是从参考电压得到的，并且偏置MOSFET开关，使得Ron是恒定的，或者Rflatness被最小化。 与现有技术的Rflatness更大的开关相比，最小化的Rflatness提供了更高的音频信号的保真度传输。

公开(公告)号：US20100231051A1

公开(公告)日：2010-09-16

申请号：US12403490

申请日：2009-03-13

申请人： Roy L. Yarbrough ,  Julie Stultz ,  Steven M. Macaluso

发明人： Roy L. Yarbrough ,  Julie Stultz ,  Steven M. Macaluso

IPC分类号： H02J1/00

CPC分类号： H03K3/356 ,  Y10T307/615 ,  Y10T307/696 ,  Y10T307/76 ,  Y10T307/858

摘要： A circuit that automatically, seamlessly connects the higher (or the lower) of two power supplies to an output is described. The circuit does not incur a one diode drop when the two power supplies are at about the same voltage levels, and the unused power supply draws no stand-by current. Cross coupled transistor and cross coupled inverters are employed.

摘要翻译： 描述了自动地将两个电源的较高（或更低）连接到输出的电路。 当两个电源处于大致相同的电压电平时，该电路不会产生一个二极管降压，而未使用的电源不会产生待机电流。 采用交叉耦合晶体管和交叉耦合的反相器。

公开(公告)号：US07782117B2

公开(公告)日：2010-08-24

申请号：US12337709

申请日：2008-12-18

申请人： Julie Stultz ,  Steven M. Macaluso

发明人： Julie Stultz ,  Steven M. Macaluso

IPC分类号： H03K17/16 ,  H03K17/687

CPC分类号： H03K17/145 ,  H03K17/063 ,  H03K17/6877

摘要： A MOSFET switch is disclosed that is driven on by a circuit that provides a constant gate to source voltage, Vgs, that is independent of the input voltage, the power supply and any logic signals. The constant Vgs is derived from a reference voltage and biases the MOSFET switch such that Ron is constant, or Rflatness is minimized. A minimized Rflatness provides a higher fidelity transfer of audio signals compared to prior art switches where Rflatness is greater.

摘要翻译： 公开了一种MOSFET开关，其由提供恒定的栅极至源极电压Vgs的电路驱动，Vgs与输入电压，电源和任何逻辑信号无关。 常数Vgs是从参考电压得到的，并且偏置MOSFET开关，使得Ron是恒定的，或者Rflatness被最小化。 与现有技术的Rflatness更大的开关相比，最小化的Rflatness提供了更高的音频信号的保真度传输。

公开(公告)号：US07554382B2

公开(公告)日：2009-06-30

申请号：US11673259

申请日：2007-02-09

申请人： Myron J. Miske ,  Julie Stultz

发明人： Myron J. Miske ,  Julie Stultz

IPC分类号： H03K17/16

CPC分类号： H03K17/063 ,  H03K17/102 ,  H03K17/162 ,  H03K17/6872 ,  H03K19/00315 ,  H03K2217/0018

摘要： An FET switch comprising a single or parallel opposite polarity FETS is illustrated with wells that are driven from internal power rails. The internal power rails are logically coupled by other driving FET switches to, in one case, the higher of a positive power supply or signal level wherein the well of the PMOS FET switch will not allow the drain/source to well diode to be forward biased. In a second case, a second power rail is logically coupled to the lower of either and input signal or ground, wherein the well of the NMOS FET will not allow the drain/source to well diode to be forward biased.

摘要翻译： 示出了包括单个或并联的相反极性FET的FET开关，其具有从内部电源轨驱动的阱。 内部电源轨由其他驱动FET开关逻辑耦合，在一种情况下，正电源或信号电平较高，其中PMOS FET开关的阱将不允许漏极/源极对阱二极管进行正向偏置 。 在第二种情况下，第二电源轨逻辑上耦合到任一个的输入信号或接地的较低端，其中NMOS FET的阱将不允许漏极/源极阱二极管被正向偏置。

公开(公告)号：US20070194832A1

公开(公告)日：2007-08-23

申请号：US11673259

申请日：2007-02-09

申请人： Myron J. Miske ,  Julie Stultz

发明人： Myron J. Miske ,  Julie Stultz

IPC分类号： H03K17/687

CPC分类号： H03K17/063 ,  H03K17/102 ,  H03K17/162 ,  H03K17/6872 ,  H03K19/00315 ,  H03K2217/0018

摘要： An FET switch comprising a single or parallel opposite polarity FETS is illustrated with wells that are driven from internal power rails. The internal power rails are logically coupled by other driving FET switches to, in one case, the higher of a positive power supply or signal level wherein the well of the PMOS FET switch will not allow the drain/source to well diode to be forward biased. In a second case, a second power rail is logically coupled to the lower of either and input signal or ground, wherein the well of the NMOS FET will not allow the drain/source to well diode to be forward biased.

摘要翻译： 示出了包括单个或并联的相反极性FET的FET开关，其具有从内部电源轨驱动的阱。 内部电源轨由其他驱动FET开关逻辑耦合，在一种情况下，正电源或信号电平较高，其中PMOS FET开关的阱将不允许漏极/源极对阱二极管进行正向偏置 。 在第二种情况下，第二电源轨逻辑上耦合到任一个的输入信号或接地的较低端，其中NMOS FET的阱将不允许漏极/源极阱二极管被正向偏置。