公开(公告)号：US20160148878A1

公开(公告)日：2016-05-26

申请号：US14583575

申请日：2014-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chi Chen ,  Chih-Yueh Li ,  Pei-Ching Yeh ,  Chih-Jen Lin

IPC: H01L23/00 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/0653 ,  H01L21/28123 ,  H01L21/76224 ,  H01L29/78

Abstract: A semiconductor pattern structure includes a substrate, an input/output (I/O) region defined on the substrate, a core region defined on the substrate, a dummy region defined on the substrate, and a gate electrode formed on the substrate. The dummy region is formed between the I/O region and the core region. The gate electrode crosses the I/O region and covers a portion of the dummy region.

Abstract translation: 半导体图案结构包括基板，限定在基板上的输入/输出（I / O）区域，限定在基板上的芯区域，限定在基板上的虚拟区域和形成在基板上的栅电极。 在I / O区域和核心区域之间形成虚拟区域。 栅电极与I / O区域交叉并覆盖虚拟区域的一部分。

公开(公告)号：US09355848B2

公开(公告)日：2016-05-31

申请号：US14057095

申请日：2013-10-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Chih Chen ,  Chung-Hsien Tsai ,  Tung-Ming Chen ,  Chih-Sheng Chang ,  Jun-Chi Huang ,  Chih-Jen Lin ,  Yu-Hsiang Lin

IPC: H01L21/336 ,  H01L21/28 ,  H01L29/423 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/28052 ,  H01L21/2652 ,  H01L21/28114 ,  H01L29/42372 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843 ,  H01L29/7847

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes following steps. A gate electrode layer is formed on a substrate. A spacer structure is formed on a sidewall of the gate electrode layer. A dielectric cap film is formed to cover the gate electrode layer and the spacer structure. A source/drain implantation is performed to the substrate with the dielectric cap film exposed to a condition of the source/drain implantation.

Abstract translation: 提供半导体结构及其形成方法。 该方法包括以下步骤。 在基板上形成栅极电极层。 间隔结构形成在栅电极层的侧壁上。 形成介电盖膜以覆盖栅电极层和间隔结构。 在介质盖膜暴露于源极/漏极注入的条件下，对衬底进行源极/漏极注入。

公开(公告)号：US09748333B2

公开(公告)日：2017-08-29

申请号：US14583575

申请日：2014-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chi Chen ,  Chih-Yueh Li ,  Pei-Ching Yeh ,  Chih-Jen Lin

IPC: H01L27/088 ,  H01L21/764 ,  H01L29/06 ,  H01L29/78 ,  H01L21/28

CPC classification number: H01L29/0653 ,  H01L21/28123 ,  H01L21/76224 ,  H01L29/78

Abstract: A semiconductor pattern structure includes a substrate, an input/output (I/O) region defined on the substrate, a core region defined on the substrate, a dummy region defined on the substrate, and a gate electrode formed on the substrate. The dummy region is formed between the I/O region and the core region. The gate electrode crosses the I/O region and covers a portion of the dummy region.

公开(公告)号：US20150108587A1

公开(公告)日：2015-04-23

申请号：US14057095

申请日：2013-10-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Chih Chen ,  Chung-Hsien Tsai ,  Tung-Ming Chen ,  Chih-Sheng Chang ,  Jun-Chi Huang ,  Chih-Jen Lin ,  Yu-Hsiang Lin

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/28052 ,  H01L21/2652 ,  H01L21/28114 ,  H01L29/42372 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843 ,  H01L29/7847

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes following steps. A gate electrode layer is formed on a substrate. A spacer structure is formed on a sidewall of the gate electrode layer. A dielectric cap film is formed to cover the gate electrode layer and the spacer structure. A source/drain implantation is performed to the substrate with the dielectric cap film exposed to a condition of the source/drain implantation.

Abstract translation: 提供半导体结构及其形成方法。 该方法包括以下步骤。 在基板上形成栅极电极层。 间隔结构形成在栅电极层的侧壁上。 形成介电盖膜以覆盖栅电极层和间隔结构。 在介质盖膜暴露于源极/漏极注入的条件下，对衬底进行源极/漏极注入。