公开(公告)号：US10707092B1

公开(公告)日：2020-07-07

申请号：US16245163

申请日：2019-01-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Hung Wang ,  En-Chiuan Liou ,  Chien-Hao Chen ,  Jhao-Hao Lee ,  Sho-Shen Lee ,  Chih-Yu Chiang

IPC: H01L21/00 ,  H01L21/311 ,  H01L21/768 ,  H01L21/033 ,  H01L27/108

Abstract: The present invention provides a method of fabricating a semiconductor pattern. Firstly, a substrate is provided, having an oxide layer thereon and a first material layer on the oxide layer, a first region and a second region are defined on the substrate. A first etching step is performed, to remove a portion of the first material layer in the first region, and then a plurality of first patterns are formed on the first material layer in the first region. A second composite layer is formed on the first pattern. Next, a second pattern layer is formed on the second composite layer in the first region, and a second etching step is performed, using the first pattern and the second pattern as a mask, to remove a portion of the second composite layer, a portion of the first material layer and a portion of the oxide layer.