公开(公告)号：US20200111791A1

公开(公告)日：2020-04-09

申请号：US16178521

申请日：2018-11-01

申请人： UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Chia-Hung Wang ,  En-Chiuan Liou ,  Chien-Hao Chen ,  Sho-Shen Lee ,  Yi-Ting Chen ,  Jhao-Hao Lee

IPC分类号： H01L27/108 ,  H01L21/033 ,  H01L21/027 ,  H01L21/311

摘要： A method of forming a layout of a semiconductor device includes the following steps. First line patterns extend along a first direction in a first area and a second area, but the first line patterns extend along a second direction in a boundary area. Second line patterns extend along a third direction in the first area and the second area, but the second line patterns extend along a fourth direction in the boundary area, so that minimum distances between overlapping areas of the first line patterns and the second line patterns in the boundary area are larger than minimum distances between overlapping areas of the first line patterns and the second line patterns in the first area and the second area. A trimming process is performed to shade the first line patterns and the second line patterns in the boundary area and the second area.

公开(公告)号：US10707213B2

公开(公告)日：2020-07-07

申请号：US16178521

申请日：2018-11-01

申请人： UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Chia-Hung Wang ,  En-Chiuan Liou ,  Chien-Hao Chen ,  Sho-Shen Lee ,  Yi-Ting Chen ,  Jhao-Hao Lee

IPC分类号： H01L21/311 ,  H01L27/108 ,  H01L21/027 ,  H01L21/033

摘要： A method of forming a layout of a semiconductor device includes the following steps. First line patterns extend along a first direction in a first area and a second area, but the first line patterns extend along a second direction in a boundary area. Second line patterns extend along a third direction in the first area and the second area, but the second line patterns extend along a fourth direction in the boundary area, so that minimum distances between overlapping areas of the first line patterns and the second line patterns in the boundary area are larger than minimum distances between overlapping areas of the first line patterns and the second line patterns in the first area and the second area. A trimming process is performed to shade the first line patterns and the second line patterns in the boundary area and the second area.

公开(公告)号：US10707092B1

公开(公告)日：2020-07-07

申请号：US16245163

申请日：2019-01-10

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chia-Hung Wang ,  En-Chiuan Liou ,  Chien-Hao Chen ,  Jhao-Hao Lee ,  Sho-Shen Lee ,  Chih-Yu Chiang

IPC分类号： H01L21/00 ,  H01L21/311 ,  H01L21/768 ,  H01L21/033 ,  H01L27/108

摘要： The present invention provides a method of fabricating a semiconductor pattern. Firstly, a substrate is provided, having an oxide layer thereon and a first material layer on the oxide layer, a first region and a second region are defined on the substrate. A first etching step is performed, to remove a portion of the first material layer in the first region, and then a plurality of first patterns are formed on the first material layer in the first region. A second composite layer is formed on the first pattern. Next, a second pattern layer is formed on the second composite layer in the first region, and a second etching step is performed, using the first pattern and the second pattern as a mask, to remove a portion of the second composite layer, a portion of the first material layer and a portion of the oxide layer.