公开(公告)号：US20170207079A1

公开(公告)日：2017-07-20

申请号：US14996238

申请日：2016-01-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Ming Lee ,  Kuo-Wei Chih ,  Chen-Hsu Hung ,  Chun-Li Lin ,  Chia-Yen Hsu ,  Tsung-Hsun Tsai ,  Po-Lun Cheng

IPC: H01L21/02 ,  B08B3/08 ,  B08B3/02

CPC classification number: H01L21/02057 ,  B08B3/10 ,  H01L21/67051

Abstract: A substrate cleaning method is provided. A substrate is provided, followed by performing a first pre-cleaning process with a first rotation speed and a first duration time. After the first pre-cleaning process, a second pre-cleaning process is performed with a second rotation speed and a second duration time, wherein the second rotation speed is greater than the first rotation speed. After the second pre-cleaning process, a cleaning process is performed by using a chemical agent with a cleaning rotation speed.

公开(公告)号：US11488949B1

公开(公告)日：2022-11-01

申请号：US17340119

申请日：2021-06-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuo-Liang Yeh ,  Jinn-Horng Lai ,  Ching-Wen Hung ,  Chien-Tung Yue ,  Chun-Li Lin

IPC: G06F17/00 ,  H01L27/02 ,  G01R35/00

Abstract: The present invention provides a method of generating dummy patterns and calibration kits, including steps of generating devices-under-test (DUTs) using a point of said chip window layer as reference point in a unit cell, generating calibration kits corresponding to the DUTs using the point as reference point in corresponding unit cells, generating DUT dummy patterns for each DUTs individually in the unit cell, copying the DUT dummy patterns in the unit cell to the corresponding calibration kits in the corresponding unit cells using the point as reference point, and merging all of the unit cell and corresponding unit cells into a final chip layout.