公开(公告)号：US09741830B2

公开(公告)日：2017-08-22

申请号：US15092623

申请日：2016-04-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kung-Hong Lee ,  Chun-Jung Tang ,  Te-Chih Chen ,  Tai-Ju Chen

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/16 ,  H01L29/161 ,  H01L29/167 ,  H01L29/24 ,  H01L29/165

CPC classification number: H01L29/66795 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/24 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: The present invention provides a method of forming a metal oxide semiconductor (MOS) device comprising a gate structure and an epitaxial structure. The gate structure is disposed on a substrate. The epitaxial structure is disposed in the substrate at two sides of the gate structure and a part thereof serves a source/drain of the MOS, wherein the epitaxial structure comprises: a first buffer layer with a second conductive type, a second buffer layer, and an epitaxial layer with a first conductive type complementary to the second conductive type. The present invention further provides a method of forming the same.

公开(公告)号：US09337339B1

公开(公告)日：2016-05-10

申请号：US14583600

申请日：2014-12-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kung-Hong Lee ,  Chun-Jung Tang ,  Te-Chih Chen ,  Tai-Ju Chen

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/24 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: The present invention provides a metal oxide semiconductor (MOS) device, comprising a gate structure and an epitaxial structure. The gate structure is disposed on a substrate. The epitaxial structure is disposed in the substrate at two sides of the gate structure and apart thereof serves a source/drain of the MOS, wherein the epitaxial structure comprises: a first buffer layer with a second conductive type, a second buffer layer, and an epitaxial layer with a first conductive type complementary to the second conductive type. The present invention further provides a method of forming the same.

Abstract translation: 本发明提供了一种包括栅极结构和外延结构的金属氧化物半导体（MOS）器件。 栅极结构设置在基板上。 所述外延结构在所述栅极结构的两侧设置在所述衬底中，并且所述外延结构用作所述MOS的源极/漏极，其中所述外延结构包括：具有第二导电类型的第一缓冲层，第二缓冲层和 具有与第二导电类型互补的第一导电类型的外延层。 本发明还提供一种形成该方法的方法。

公开(公告)号：US20160155837A1

公开(公告)日：2016-06-02

申请号：US14583600

申请日：2014-12-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kung-Hong Lee ,  Chun-Jung Tang ,  Te-Chih Chen ,  Tai-Ju Chen

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/24 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: The present invention provides a metal oxide semiconductor (MOS) device, comprising a gate structure and an epitaxial structure. The gate structure is disposed on a substrate. The epitaxial structure is disposed in the substrate at two sides of the gate structure and apart thereof serves a source/drain of the MOS, wherein the epitaxial structure comprises: a first buffer layer with a second conductive type, a second buffer layer, and an epitaxial layer with a first conductive type complementary to the second conductive type. The present invention further provides a method of forming the same.

Abstract translation: 本发明提供了一种包括栅极结构和外延结构的金属氧化物半导体（MOS）器件。 栅极结构设置在基板上。 所述外延结构在所述栅极结构的两侧设置在所述衬底中，并且所述外延结构用作所述MOS的源极/漏极，其中所述外延结构包括：具有第二导电类型的第一缓冲层，第二缓冲层和 具有与第二导电类型互补的第一导电类型的外延层。 本发明还提供一种形成该方法的方法。

公开(公告)号：US10475738B2

公开(公告)日：2019-11-12

申请号：US15391822

申请日：2016-12-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kung-Hong Lee ,  Mu-Kai Tsai ,  Chung-Hsing Lin

IPC: H01L23/522 ,  H01L49/02 ,  H01L27/088 ,  H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/78

Abstract: A semiconductor device preferably includes: a first metal-oxide semiconductor (MOS) transistor on a substrate; a first ferroelectric (FE) layer connected to the first MOS transistor; a second MOS transistor on the substrate; and a second FE layer connected to the second MOS transistor. Preferably, the first FE layer and the second FE layer include different capacitance.

公开(公告)号：US20180182860A1

公开(公告)日：2018-06-28

申请号：US15391822

申请日：2016-12-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kung-Hong Lee ,  Mu-Kai Tsai ,  Chung-Hsing Lin

IPC: H01L29/51 ,  H01L49/02 ,  H01L27/088 ,  H01L27/092 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device preferably includes: a first metal-oxide semiconductor (MOS) transistor on a substrate; a first ferroelectric (FE) layer connected to the first MOS transistor; a second MOS transistor on the substrate; and a second FE layer connected to the second MOS transistor. Preferably, the first FE layer and the second FE layer include different capacitance.

公开(公告)号：US20160225880A1

公开(公告)日：2016-08-04

申请号：US15092623

申请日：2016-04-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kung-Hong Lee ,  Chun-Jung Tang ,  Te-Chih Chen ,  Tai-Ju Chen

IPC: H01L29/66 ,  H01L29/161 ,  H01L29/16 ,  H01L29/24 ,  H01L29/78 ,  H01L29/167

CPC classification number: H01L29/66795 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/24 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: The present invention provides a method of forming a metal oxide semiconductor (MOS) device comprising a gate structure and an epitaxial structure. The gate structure is disposed on a substrate. The epitaxial structure is disposed in the substrate at two sides of the gate structure and a part thereof serves a source/drain of the MOS, wherein the epitaxial structure comprises: a first buffer layer with a second conductive type, a second buffer layer, and an epitaxial layer with a first conductive type complementary to the second conductive type. The present invention further provides a method of forming the same.

Abstract translation: 本发明提供一种形成包括栅极结构和外延结构的金属氧化物半导体（MOS）器件的方法。 栅极结构设置在基板上。 外延结构在栅极结构的两侧设置在衬底中，其一部分用作MOS的源极/漏极，其中外延结构包括：具有第二导电类型的第一缓冲层，第二缓冲层和 具有与第二导电类型互补的第一导电类型的外延层。 本发明还提供一种形成该方法的方法。