公开(公告)号：US09196723B1

公开(公告)日：2015-11-24

申请号：US14564050

申请日：2014-12-08

申请人： UNITED MICROELECTRONICS CORP.

发明人： Kuan-Yu Chen ,  Tseng-Hsun Liu ,  Min-Hsuan Tsai ,  Te-Chang Chiu ,  Chiu-Ling Lee ,  Chiu-Te Lee

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/45

CPC分类号： H01L29/782 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1079 ,  H01L29/45 ,  H01L29/665 ,  H01L29/7816 ,  H01L29/7817 ,  H01L29/7823 ,  H01L29/872

摘要： The present invention provides a semiconductor device structure which integrates a lateral diffused metal oxide semiconductor (LDMOS) with a Schottky diode, including: a substrate, having a first conductivity type, a gate positioned on the substrate, a drain region formed in the substrate, the drain region having a second conductivity type complementary to the first conductivity type, a source region formed in the substrate, the source region having the second conductivity type, a high-voltage well region formed in the substrate, the high-voltage well region having a first conductivity type; a Schottky diode disposed on the substrate and disposed beside the LDMOS, wherein the semiconductor device structure is an asymmetric structure, and a deep well region disposed in the substrate and having the second conductivity type, wherein the LDMOS and the Schottky diode are all formed within the deep well region.

摘要翻译： 本发明提供了一种将横向扩散金属氧化物半导体（LDMOS）与肖特基二极管集成的半导体器件结构，包括：具有第一导电类型的衬底，位于衬底上的栅极，形成在衬底中的漏极区， 所述漏极区域具有与所述第一导电类型互补的第二导电类型，形成在所述衬底中的源极区域，具有第二导电类型的源极区域，形成在所述衬底中的高压阱区域，所述高压阱区域具有 第一导电类型; 设置在衬底上并设置在LDMOS旁边的肖特基二极管，其中半导体器件结构是不对称结构，以及设置在衬底中并且具有第二导电类型的深阱区，其中LDMOS和肖特基二极管全部形成在 深井区域。

公开(公告)号：US08994103B2

公开(公告)日：2015-03-31

申请号：US13938252

申请日：2013-07-10

申请人： United Microelectronics Corp.

发明人： Wei-Lin Chen ,  Tseng-Hsun Liu ,  Kuan-Yu Chen ,  Chiu-Ling Lee ,  Chiu-Te Lee ,  Chih-Chung Wang

IPC分类号： H01L29/66 ,  H01L29/78

CPC分类号： H01L29/7816 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66704 ,  H01L29/7825

摘要： A lateral double-diffused metal-oxide-semiconductor transistor device includes a substrate having at least a shallow trench isolation formed therein, an epitaxial layer encompassing the STI in the substrate, a gate, and a drain region and a source region formed in the substrate at respective two sides of the gate. The epitaxial layer, the source region and the drain region include a first conductivity type. The gate includes a first portion formed on the substrate and a second portion extending into the STI.

摘要翻译： 横向双扩散金属氧化物半导体晶体管器件包括其中形成有至少浅沟槽隔离的衬底，包围衬底中的STI的外延层，栅极和漏极区以及形成在衬底中的源极区 在门的相应两侧。 外延层，源极区和漏极区包括第一导电型。 栅极包括形成在基板上的第一部分和延伸到STI中的第二部分。

公开(公告)号：US20150014768A1

公开(公告)日：2015-01-15

申请号：US13938252

申请日：2013-07-10

申请人： UNITED MICROELECTRONICS CORP.

发明人： Wei-Lin Chen ,  Tseng-Hsun Liu ,  Kuan-Yu Chen ,  Chiu-Ling Lee ,  Chiu-Te Lee ,  Chih-Chung Wang

IPC分类号： H01L29/78 ,  H01L29/66

CPC分类号： H01L29/7816 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66704 ,  H01L29/7825

摘要： A lateral double-diffused metal-oxide-semiconductor transistor device includes a substrate having at least a shallow trench isolation formed therein, an epitaxial layer encompassing the STI in the substrate, a gate, and a drain region and a source region formed in the substrate at respective two sides of the gate. The epitaxial layer, the source region and the drain region include a first conductivity type. The gate includes a first portion formed on the substrate and a second portion extending into the STI.

摘要翻译： 横向双扩散金属氧化物半导体晶体管器件包括其中形成有至少浅沟槽隔离的衬底，包围衬底中的STI的外延层，栅极和漏极区以及形成在衬底中的源极区 在门的相应两侧。 外延层，源极区和漏极区包括第一导电型。 栅极包括形成在基板上的第一部分和延伸到STI中的第二部分。