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公开(公告)号:US09117847B2
公开(公告)日:2015-08-25
申请号:US14516592
申请日:2014-10-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Cheng-Yuan Hsu , Chi Ren , Tzeng-Fei Wen
IPC: H01L21/06 , H01L29/66 , H01L29/423 , H01L29/788 , H01L21/28 , H01L27/115 , H01L21/266
CPC classification number: H01L29/66825 , H01L21/266 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/42328 , H01L29/42332 , H01L29/6653 , H01L29/6656 , H01L29/7881 , H01L29/7882
Abstract: A method of fabricating a semiconductor device is disclosed. The method includes the steps of: sequentially forming agate dielectric layer and a first gate layer on a semiconductor substrate, wherein the gate dielectric layer is between the first gate layer and the semiconductor substrate; forming at least an opening in the first gate layer; forming a first dielectric layer conformally on the semiconductor substrate wherein the first dielectric layer covers the first gate layer; and forming a second gate layer filling the opening and overlapping the first gate layer.
Abstract translation: 公开了制造半导体器件的方法。 该方法包括以下步骤:在半导体衬底上依次形成玛瑙电介质层和第一栅极层,其中栅介电层位于第一栅层和半导体衬底之间; 在所述第一栅极层中形成至少一个开口; 在所述半导体衬底上共形形成第一电介质层,其中所述第一电介质层覆盖所述第一栅极层; 以及形成填充所述开口并与所述第一栅极层重叠的第二栅极层。
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公开(公告)号:US20150056768A1
公开(公告)日:2015-02-26
申请号:US14516592
申请日:2014-10-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Cheng-Yuan Hsu , CHI Ren , Tzeng-Fei Wen
IPC: H01L29/66 , H01L21/266 , H01L21/28 , H01L29/423
CPC classification number: H01L29/66825 , H01L21/266 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/42328 , H01L29/42332 , H01L29/6653 , H01L29/6656 , H01L29/7881 , H01L29/7882
Abstract: A method of fabricating a semiconductor device is disclosed. The method includes the steps of: sequentially forming agate dielectric layer and a first gate layer on a semiconductor substrate, wherein the gate dielectric layer is between the first gate layer and the semiconductor substrate; forming at least an opening in the first gate layer; forming a first dielectric layer conformally on the semiconductor substrate wherein the first dielectric layer covers the first gate layer; and forming a second gate layer filling the opening and overlapping the first gate layer.
Abstract translation: 公开了制造半导体器件的方法。 该方法包括以下步骤:在半导体衬底上依次形成玛瑙电介质层和第一栅极层,其中栅介电层位于第一栅层和半导体衬底之间; 在所述第一栅极层中形成至少一个开口; 在所述半导体衬底上共形形成第一电介质层,其中所述第一电介质层覆盖所述第一栅极层; 以及形成填充所述开口并与所述第一栅极层重叠的第二栅极层。
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