公开(公告)号：US20190189738A1

公开(公告)日：2019-06-20

申请号：US16280047

申请日：2019-02-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wanxun HE ,  Su Xing

IPC: H01L29/06 ,  H01L29/165 ,  H01L29/78 ,  H01L29/161 ,  H01L29/16 ,  H01L29/08 ,  H01L29/66 ,  H01L29/24 ,  H01L21/285 ,  H01L21/768 ,  H01L29/45 ,  H01L21/28

CPC classification number: H01L29/0649 ,  H01L21/28088 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76895 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/45 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/66651 ,  H01L29/7834 ,  H01L29/7848

Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate, forming a gate structure on the substrate, forming a hard mask on the substrate and the gate structure, patterning the hard mask to form trenches exposing part of the substrate, and forming raised epitaxial layers in the trenches. Preferably, the gate structure is extended along a first direction on the substrate and the raised epitaxial layers are elongated along a second direction adjacent to two sides of the gate structure.