公开(公告)号：US20150126015A1

公开(公告)日：2015-05-07

申请号：US14583122

申请日：2014-12-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chieh-Te Chen ,  Yi-Po Lin ,  Jiunn-Hsiung Liao ,  Shui-Yen Lu ,  Li-Chiang Chen

IPC: H01L49/02

CPC classification number: H01L28/20 ,  H01L21/76897 ,  H01L27/0629 ,  H01L28/24 ,  H01L29/66545

Abstract: A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided.

Abstract translation: 半导体结构包括基板，抗蚀剂层，电介质材料，两个U形金属层和两种金属。 衬底具有隔离结构。 抗蚀剂层位于隔离结构上。 介电材料位于抗蚀剂层上。 两个U形金属层位于电介质材料的两侧和抗蚀剂层上。 两个金属分别位于两个U形金属层上。 以这种方式提供了用于形成所述半导体结构的半导体工艺。

公开(公告)号：US20140038399A1

公开(公告)日：2014-02-06

申请号：US14054839

申请日：2013-10-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Feng-Yi Chang ,  Yi-Po Lin ,  Jiunn-Hsiung Liao ,  Shang-Yuan Tsai ,  Chih-Wen Feng ,  Shui-Yen Lu ,  Ching-Pin Hsu

IPC: H01L21/308

CPC classification number: H01L21/308 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76816

Abstract: A method for fabricating an aperture is disclosed. The method includes the steps of: forming a hard mask containing carbon on a surface of a semiconductor substrate; and using a non-oxygen element containing gas to perform a first etching process for forming a first aperture in the hard mask. Before forming the hard mask, a gate which includes a contact etch stop layer and a dielectric layer is formed on the semiconductor substrate.

Abstract translation: 公开了一种制造孔的方法。 该方法包括以下步骤：在半导体衬底的表面上形成含有碳的硬掩模; 并且使用含有气体的非氧元素进行用于在硬掩模中形成第一孔的第一蚀刻工艺。 在形成硬掩模之前，在半导体衬底上形成包括接触蚀刻停止层和电介质层的栅极。

公开(公告)号：US09165997B2

公开(公告)日：2015-10-20

申请号：US14583122

申请日：2014-12-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chieh-Te Chen ,  Yi-Po Lin ,  Jiunn-Hsiung Liao ,  Shui-Yen Lu ,  Li-Chiang Chen

IPC: H01L21/20 ,  H01L21/332 ,  H01L49/02 ,  H01L27/06 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L28/20 ,  H01L21/76897 ,  H01L27/0629 ,  H01L28/24 ,  H01L29/66545

Abstract: A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided.

Abstract translation: 半导体结构包括基板，抗蚀剂层，电介质材料，两个U形金属层和两种金属。 衬底具有隔离结构。 抗蚀剂层位于隔离结构上。 介电材料位于抗蚀剂层上。 两个U形金属层位于电介质材料的两侧和抗蚀剂层上。 两个金属分别位于两个U形金属层上。 以这种方式提供了用于形成所述半导体结构的半导体工艺。