公开(公告)号：US10381056B2

公开(公告)日：2019-08-13

申请号：US15992130

申请日：2018-05-29

申请人： UNITED MICROELECTRONICS CORP.

发明人： Tien-Yu Lu ,  Chun-Hsien Huang ,  Ching-Cheng Lung ,  Yu-Tse Kuo ,  Shou-Sian Chen ,  Koji Nii ,  Yuichiro Ishii

IPC分类号： G11C8/16 ,  G11C8/08 ,  H01L27/11 ,  G11C11/412 ,  G11C7/12

摘要： A dual port static random access memory (DPSRAM) cell includes a first power line, a first bit line and a second bit line. The first power line is disposed between a first word line and a second word line. The first bit line is disposed between the first word line and the first power line. The second bit line is disposed between the second word line and the first power line.

公开(公告)号：US20190206459A1

公开(公告)日：2019-07-04

申请号：US15992130

申请日：2018-05-29

申请人： UNITED MICROELECTRONICS CORP.

发明人： Tien-Yu Lu ,  Chun-Hsien Huang ,  Ching-Cheng Lung ,  Yu-Tse Kuo ,  Shou-Sian Chen ,  Koji Nii ,  Yuichiro Ishii

IPC分类号： G11C8/16 ,  G11C8/08 ,  G11C7/12 ,  G11C11/412 ,  H01L27/11

CPC分类号： G11C8/16 ,  G11C5/025 ,  G11C7/12 ,  G11C7/18 ,  G11C8/08 ,  G11C8/14 ,  G11C11/412 ,  G11C11/418 ,  G11C11/419 ,  H01L27/11

摘要： A dual port static random access memory (DPSRAM) cell includes a first power line, a first bit line and a second bit line. The first power line is disposed between a first word line and a second word line. The first bit line is disposed between the first word line and the first power line. The second bit line is disposed between the second word line and the first power line.