公开(公告)号：US09490141B2

公开(公告)日：2016-11-08

申请号：US14585210

申请日：2014-12-30

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Wei-Nan Fang ,  Jiann-Shiun Chen ,  Tzu-Yi Chuang

IPC: H01L21/321 ,  H01L21/311 ,  H01L21/02 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/3212 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/28525 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/7684 ,  H01L21/76877

Abstract: A method for planarizing a semiconductor device includes steps herein. A substrate is provided, on which a stop layer is formed. A trench is formed in the substrate. A first semiconductor film is deposited conformally on the stop layer and the trench. A second semiconductor film is deposited to fill the trench and cover the first semiconductor film. A chemical-mechanical polishing process is performed until the stop layer is exposed. A removal rate of the chemical-mechanical polishing process on the first semiconductor film is higher than that on the second semiconductor film. The first dielectric layer on the substrate selectively is removed.

Abstract translation: 半导体器件的平坦化方法包括这里的步骤。 设置有基板，在其上形成有阻挡层。 在衬底中形成沟槽。 第一半导体膜被共形地沉积在停止层和沟槽上。 沉积第二半导体膜以填充沟槽并覆盖第一半导体膜。 执行化学机械抛光工艺，直到停止层暴露。 第一半导体膜上的化学机械抛光工艺的去除率高于第二半导体膜上的去除率。 选择性地去除衬底上的第一介电层。