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公开(公告)号:US20250126909A1
公开(公告)日:2025-04-17
申请号:US18991769
申请日:2024-12-23
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Il Kwon SHIM , Jeffrey PUNZALAN , Emmanuel ESPIRITU , Allan ILAGAN , Teddy Joaquin CARREON
Abstract: A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes applying a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a recessed structure on the second major cover surface. The recessed structure is located above die bond pads on the die to create an elevated space over peak portions of wire bonds on the die bond pads. An encapsulant is disposed on the package substrate to cover exposed portions of the package substrate, die and bond wires and side surfaces of the protective cover, while leaving the first major cover surface exposed.
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公开(公告)号:US20230098224A1
公开(公告)日:2023-03-30
申请号:US17936859
申请日:2022-09-30
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Il Kwon SHIM , Jeffrey PUNZALAN
IPC: H01L27/146
Abstract: A semiconductor package is disclosed. The package includes a sensor die which is disposed on a package substrate. A cover structure is attached to a cover adhesive surrounding the sensor die, forming a cavity above the sensor die. The cover structure includes a primary cover structure and a secondary cover structure surrounding the primary cover structure. The secondary cover structure is configured to protect the primary cover structure from damage during packaging. The package also includes an encapsulant. The encapsulant covers side surfaces of the cover structure, sides of the cover adhesive, and exposed portions of the package substrate, leaving the first major cover surface exposed.
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公开(公告)号:US20210366963A1
公开(公告)日:2021-11-25
申请号:US17394365
申请日:2021-08-04
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Il Kwon SHIM , Jeffrey PUNZALAN , Emmanuel ESPIRITU , Allan ILAGAN , Teddy Joaquin CARREON
IPC: H01L27/146 , H01L23/00
Abstract: A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes applying a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a recessed structure on the second major cover surface. The recessed structure is located above die bond pads on the die to create an elevated space over peak portions of wire bonds on the die bond pads. An encapsulant is disposed on the package substrate to cover exposed portions of the package substrate, die and bond wires and side surfaces of the protective cover, while leaving the first major cover surface exposed.
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公开(公告)号:US20230122384A1
公开(公告)日:2023-04-20
申请号:US18046941
申请日:2022-10-17
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Il Kwon SHIM , Jeffrey PUNZALAN
IPC: H01L27/146
Abstract: A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a cover attached to the first major die surface, the cover includes top and bottom major cover surfaces and side cover surfaces. The cover includes an opaque region disposed at a periphery of the bottom cover surface of the cover, the opaque region is configured to prevent flaring or scattering of light. An encapsulant is disposed on the package substrate to cover exposed portions of the package substrate, die and bond wires and side surfaces of the cover, while leaving the first major cover surface exposed.
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公开(公告)号:US20220028798A1
公开(公告)日:2022-01-27
申请号:US17382283
申请日:2021-07-21
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Saravuth SIRINORAKUL , Il Kwon SHIM , Kok Chuen LOCK , Roel Adeva ROBLES , Eakkasit DUMSONG
IPC: H01L23/552 , H01L23/36 , H01L23/31 , H01L23/495 , H01L23/00 , H01L21/56
Abstract: The present disclosure is directed to improving EMI shielding to provide more reliable semiconductor packages. The semiconductor package may be, for example, a lead frame including one or multiple dies attached thereto. The semiconductor package may include only wire bonds or a combination of clip bonds and wire bonds. An integrated shielding structure may be disposed in between the package substrate and the encapsulant to shield internal and/or external EMI. For example, a top surface of the integrated shield structure is exposed.
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