公开(公告)号：US20220037219A1

公开(公告)日：2022-02-03

申请号：US17389294

申请日：2021-07-29

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Eakkasit DUMSONG ,  Mike Jayson CANDELARIO ,  Phongsak Sawasdee ,  Jiraphat Charoenratpratoom ,  Paweena PHATTO ,  Maythichai SAITHONG

IPC: H01L23/053 ,  H01L23/00 ,  H01L21/52

Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die cavity with a die attached therein. The package substrate also includes a cavity for bonding a cap thereto to form a hermetic package. The cap is bonded to the cavity using sealing rings.

公开(公告)号：US20220028798A1

公开(公告)日：2022-01-27

申请号：US17382283

申请日：2021-07-21

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Saravuth SIRINORAKUL ,  Il Kwon SHIM ,  Kok Chuen LOCK ,  Roel Adeva ROBLES ,  Eakkasit DUMSONG

IPC: H01L23/552 ,  H01L23/36 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/56

Abstract: The present disclosure is directed to improving EMI shielding to provide more reliable semiconductor packages. The semiconductor package may be, for example, a lead frame including one or multiple dies attached thereto. The semiconductor package may include only wire bonds or a combination of clip bonds and wire bonds. An integrated shielding structure may be disposed in between the package substrate and the encapsulant to shield internal and/or external EMI. For example, a top surface of the integrated shield structure is exposed.