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公开(公告)号:US20200321273A1
公开(公告)日:2020-10-08
申请号:US16886728
申请日:2020-05-28
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Hua Hong TAN , Wilson Poh Leng ONG , Kriangsak Sae LE , Saravuth SIRINORAKUL , Somsak PHUKRONGHIN , Paweena PHATTO
IPC: H01L23/498 , H01L23/16 , H01L23/31 , H01L21/48 , H01L21/52 , H01L21/56 , H01L23/055 , H01L23/04 , H01L23/24
Abstract: A method for forming a semiconductor package is disclosed herein. The method includes forming a package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate includes a recess region below the first major surface defined with a die region and a non-die region surrounding the die region. A semiconductor die is disposed in the die region within the recess region. A dam structure is disposed within the recess region. The dam structure surrounds the semiconductor die and extends upwardly to a height below the first major surface of the package substrate. The method also includes dispensing a liquid encapsulant material into the recess region. The liquid encapsulant material is surrounded by the dam structure and extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.
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公开(公告)号:US20220037219A1
公开(公告)日:2022-02-03
申请号:US17389294
申请日:2021-07-29
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Eakkasit DUMSONG , Mike Jayson CANDELARIO , Phongsak Sawasdee , Jiraphat Charoenratpratoom , Paweena PHATTO , Maythichai SAITHONG
IPC: H01L23/053 , H01L23/00 , H01L21/52
Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die cavity with a die attached therein. The package substrate also includes a cavity for bonding a cap thereto to form a hermetic package. The cap is bonded to the cavity using sealing rings.
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公开(公告)号:US20190043797A1
公开(公告)日:2019-02-07
申请号:US16056541
申请日:2018-08-07
Applicant: UTAC Headquarters Pte. Ltd.
Inventor: Hua Hong TAN , Wilson Poh Leng ONG , Kriangsak Sae LE , Saravuth SIRINORAKUL , Somsak PHUKRONGHIN , Paweena PHATTO
IPC: H01L23/498 , H01L23/00 , H01L23/16 , H01L23/31 , H01L23/055 , H01L21/48 , H01L21/52 , H01L21/56
Abstract: An improved method for forming a semiconductor package is disclosed herein. The method includes forming a multi-layer package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate comprises a recess region. A semiconductor die is attached to the die region within the recess region. A dam structure is formed within the recess region. The dam structure surrounds the semiconductor die and extends upward to a height below the first major surface of the package substrate. A liquid encapsulant material is dispensed into the recess region. The liquid encapsulant material is surrounded by the dam structure. The liquid encapsulant extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.
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