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公开(公告)号:US09825039B1
公开(公告)日:2017-11-21
申请号:US15296922
申请日:2016-10-18
Applicant: United Microelectronics Corp.
Inventor: Po-Hsieh Lin , Yi-Chuen Eng , Szu-Hao Lai , Ming-Chih Chen
IPC: H01L29/66 , H01L27/108 , H01L29/78 , H01L29/10 , H01L29/08 , H01L21/8234
CPC classification number: H01L27/10802 , H01L21/823431 , H01L21/823487 , H01L27/088 , H01L27/10844 , H01L27/10873 , H01L29/78642
Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor body, a first doped region, a second doped region, a gate and a dielectric layer. The semiconductor body is disposed on a dielectric substrate and has a protrusion portion, a first portion and a second portion. The first portion and the second portion are respectively disposed at two opposite sides of the protrusion portion. The first doped region is disposed in a top of the protrusion portion. The second doped region is disposed in an end of the first portion far away from the protrusion portion. The gate is disposed on the first portion and adjacent to the protrusion portion. The dielectric layer is disposed between the gate and the protrusion portion, and between the gate and the first portion.
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公开(公告)号:US09773922B1
公开(公告)日:2017-09-26
申请号:US15336819
申请日:2016-10-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Po-Hsieh Lin , Chia-Fu Hsu , Bei-Zhun Syu
IPC: H01L27/115 , H01L29/792 , H01L29/10 , H01L29/78 , H01L27/1158
CPC classification number: H01L29/7827 , H01L27/1158 , H01L27/11582 , H01L29/1037 , H01L29/7926
Abstract: A memory device includes: a substrate; a channel layer on the substrate, in which the channel layer includes a T-shape having a horizontal portion with a first end and a second end and a vertical portion having a third end; a gate structure on a side of the vertical portion; an oxide-nitride-oxide (ONO) layer between the gate structure and the vertical portion; a source region on the first end of the horizontal portion; and a drain region on the third end of the vertical portion.
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