公开(公告)号：US10720524B1

公开(公告)日：2020-07-21

申请号：US16536333

申请日：2019-08-09

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Zhengkang Wang ,  Dong Fang ,  Ruidi Wang ,  Bo Zhang

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66

Abstract: A split-gate enhanced power MOS device includes a substrate and an epitaxial layer formed on an upper surface of the substrate. A control gate trench is provided in the epitaxial layer. The control gate trench includes a gate electrode and a split-gate electrode. The gate electrode includes a first gate electrode and a second gate electrode. The first gate electrode and the second gate electrode are located in an upper half portion of the control gate trench and are separated by a first dielectric layer. The first gate electrode and the second gate electrode are located above the split-gate electrode and are separated from the split-gate electrode by a second dielectric layer. The first gate electrode and the second gate electrode are separated from a body region in the epitaxial layer by a gate dielectric.