公开(公告)号：US20140210044A1

公开(公告)日：2014-07-31

申请号：US14076419

申请日：2013-11-11

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE

IPC: H01L27/02 ,  H01L27/07

CPC classification number: H01L28/10 ,  H01L23/5227 ,  H01L27/0248 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including a first insulating layer and a second insulating layer sequentially disposed on a substrate is disclosed. A first conductive line and a second conductive line are disposed in the first insulating layer, and each of the first and second conductive lines has a first end and a second end, wherein the second ends of the first and second conductive lines are coupled to each other. A first winding portion and a second winding portion are disposed in the second insulating layer, and each of the first and second winding portions includes a third conductive line and a fourth conductive line arranged from the inside to the outside. Each of the third and fourth conductive lines has a first end and a second end, wherein the first and second conductive lines overlap at least a portion of the third conductive lines.

Abstract translation: 公开了一种包括顺序地设置在基板上的第一绝缘层和第二绝缘层的半导体器件。 第一导电线和第二导线设置在第一绝缘层中，并且第一和第二导线中的每一个具有第一端和第二端，其中第一和第二导线的第二端耦合到每个 其他。 第一绕组部分和第二绕组部分设置在第二绝缘层中，并且第一和第二绕组部分中的每一个包括从内向外布置的第三导线和第四导线。 第三和第四导线中的每一个具有第一端和第二端，其中第一和第二导线与第三导线的至少一部分重叠。

公开(公告)号：US20180254314A1

公开(公告)日：2018-09-06

申请号：US15971218

申请日：2018-05-04

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06

CPC classification number: H01L28/10 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L29/0619

Abstract: A semiconductor device includes an insulating layer disposed over a substrate, wherein the insulating layer has a center region. A first winding portion and a second winding portion are electrically connected to the first winding portion, disposed in a first level of the insulating layer and surrounding the center region, wherein each of the first winding portion and the second winding portion comprises a plurality of conductive lines arranged from the inside to the outside. A first extending conductive line and a second extending conductive line partially surround the first extending conductive line, and are disposed in the first level of the insulating layer, wherein the first winding portion and the second winding portion surround the first extending conductive line and the second extending conductive line. A third extending conductive line is disposed in a second level of the insulating layer and surrounding the center region.

公开(公告)号：US20150340423A1

公开(公告)日：2015-11-26

申请号：US14813510

申请日：2015-07-30

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE

IPC: H01L49/02

CPC classification number: H01L28/10 ,  H01L23/5227 ,  H01L27/0248 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including a first insulating layer and a second insulating layer sequentially disposed on a substrate having a center region. The semiconductor device includes a first winding portion and a second winding portion disposed in the second insulating layer and surrounding the center region A second conductive line and a third conductive line are arranged from the inside to the outside. In addition, each of the first, second and third conductive lines has a first end and a second end. The semiconductor device also includes a coupling portion disposed in the first and second insulating layers between the first and second winding portions, and having a first pair of connection layers cross-connecting the second ends of the first and second conductive lines, and a second pair of connection layers cross-connecting the first ends of the second and third conductive lines.

Abstract translation: 一种半导体器件，包括顺序地设置在具有中心区域的衬底上的第一绝缘层和第二绝缘层。 半导体器件包括设置在第二绝缘层中并围绕中心区域的第一绕组部分和第二绕组部分，从内向外布置第二导线和第三导线。 此外，第一，第二和第三导线中的每一个具有第一端和第二端。 该半导体器件还包括一个耦合部分，设置在第一和第二绕组部分之间的第一和第二绝缘层中，并具有交叉连接第一和第二导线的第二端的第一对连接层，以及第二对 的连接层交叉连接第二和第三导线的第一端。

公开(公告)号：US20180012952A1

公开(公告)日：2018-01-11

申请号：US15440082

申请日：2017-02-23

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06

CPC classification number: H01L28/10 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L29/0619

Abstract: A semiconductor device includes first and second winding portions disposed in a first level of an insulating layer and surrounding a center region thereof. Each of the winding portions includes conductive lines arranged from the inside to the outside. First and second extending conductive lines are disposed in the first level of the insulating layer. A third extending conductive line is disposed in a second level of the insulating layer. The first extending conductive line is coupled between the innermost conductive line of the second winding and the third extending conductive line. The second extending conductive line is coupled between the innermost conductive line of the first winding portion and the third extending conductive line. The first extending conductive line and the third extending conductive line coupled thereto are arranged in a helix or a spiral spatial configuration.

公开(公告)号：US20160148926A1

公开(公告)日：2016-05-26

申请号：US14926888

申请日：2015-10-29

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE ,  Yin-Ku CHANG

IPC: H01L27/02 ,  H01L49/02 ,  H01L27/07

CPC classification number: H01L27/0288 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/5283 ,  H01L27/0641 ,  H01L27/0788 ,  H01L27/0805 ,  H01L28/10 ,  H01L28/40 ,  H01L28/60 ,  H01L29/93 ,  H01L29/94 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention provides an integrated circuit device. The integrated circuit device includes a substrate. A first capacitor is disposed on the substrate. A first metal pattern is coupled to a first electrode of the first capacitor. A second metal pattern is coupled to a first electrode of the second capacitor. A third metal pattern is disposed over the first and second metal patterns. The third metal pattern covers the first capacitor, the first metal pattern and the second metal pattern. The third metal pattern is electrically grounding. An inductor is disposed over the third metal pattern.

Abstract translation: 本发明提供一种集成电路装置。 集成电路器件包括衬底。 第一电容器设置在基板上。 第一金属图案耦合到第一电容器的第一电极。 第二金属图案耦合到第二电容器的第一电极。 第三金属图案设置在第一和第二金属图案之上。 第三金属图案覆盖第一电容器，第一金属图案和第二金属图案。 第三金属图案是电接地。 电感器设置在第三金属图案之上。

公开(公告)号：US20160148929A1

公开(公告)日：2016-05-26

申请号：US14926851

申请日：2015-10-29

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE ,  Yin-Ku CHANG

IPC: H01L27/06 ,  H01L29/94 ,  H01L29/93 ,  H01L49/02 ,  H01L23/528

CPC classification number: H01L27/0288 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/5283 ,  H01L27/0641 ,  H01L27/0788 ,  H01L27/0805 ,  H01L28/10 ,  H01L28/40 ,  H01L28/60 ,  H01L29/93 ,  H01L29/94 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention provides an integrated circuit device. The integrated circuit device includes a substrate. A first capacitor is disposed on the substrate. A first metal pattern is coupled to a first electrode of the first capacitor. A second metal pattern is coupled to a first electrode of the second capacitor. A third metal pattern is disposed over the first and second metal patterns. The third metal pattern covers the first capacitor, the first metal pattern, and the second metal pattern. The third metal pattern is electrically grounded. An inductor is disposed over the third metal pattern.

Abstract translation: 本发明提供一种集成电路装置。 集成电路装置包括基板。 第一电容器设置在基板上。 第一金属图案耦合到第一电容器的第一电极。 第二金属图案耦合到第二电容器的第一电极。 第三金属图案设置在第一和第二金属图案之上。 第三金属图案覆盖第一电容器，第一金属图案和第二金属图案。 第三金属图案电接地。 电感器设置在第三金属图案之上。

公开(公告)号：US20140307376A1

公开(公告)日：2014-10-16

申请号：US14046629

申请日：2013-10-04

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Yuan LEE

IPC: G06F1/16

CPC classification number: G06F1/266 ,  G06F1/1632

Abstract: A transmittal system including an extension device, a connection device, and an impedance device is disclosed. The extension device includes a first connection port and is coupled to a peripheral device. The connection device includes a second connection port and a third connection port. The second connection port is coupled to the first connection port. The third connection port is coupled to an electronic device. The impedance device connects at least one of the first, the second and the third connection ports to ground.

Abstract translation: 公开了一种包括扩展装置，连接装置和阻抗装置的传输系统。 扩展装置包括第一连接端口并且耦合到外围设备。 连接装置包括第二连接端口和第三连接端口。 第二连接端口连接到第一连接端口。 第三连接端口耦合到电子设备。 阻抗装置将第一，第二和第三连接端口中的至少一个连接到地。