公开(公告)号：US11748152B2

公开(公告)日：2023-09-05

申请号：US17503998

申请日：2021-10-18

Applicant: VMware, Inc.

Inventor： Mazhar Memon ,  Subramanian Rama ,  Maciej Bajkowski

IPC: G06F9/48 ,  G06F11/30 ,  G06F8/61 ,  G06F11/34

CPC classification number: G06F9/485 ,  G06F8/61 ,  G06F9/4881 ,  G06F11/3024 ,  G06F11/3409 ,  G06F11/3414 ,  G06F2201/865

Abstract: In a data processing system running at least one application on a hardware platform that includes at least one processor and a plurality of coprocessors, at least one kernel dispatched by an application is intercepted by an intermediate software layer running logically between the application and the system software. Compute functions are determined within kernel(s), and data dependencies are determined among the compute functions. The compute functions are dispatched to selected ones of the coprocessors based at least in part on the determined data dependencies and kernel results are returned to the application that dispatched the respective kernel.

公开(公告)号：US20220405104A1

公开(公告)日：2022-12-22

申请号：US17377893

申请日：2021-07-16

Applicant: VMware, Inc.

Inventor： Tiejun Chen ,  Olivier Alain Cremel ,  Kit Colbert ,  Chris Wolf ,  Mazhar Memon ,  Renu Raman ,  Peter Buckingham ,  Shreekanta Das

IPC: G06F9/38 ,  G06F9/451 ,  G06F9/54

Abstract: Disclosed are various examples of providing cross platform accelerator remoting between complex instruction set computer (CISC) components and reduced instruction set computer (RISC) components of a computing environment. An accelerator remoting server receives accelerator instructions executable by a locally installed accelerator device and provides the accelerator instructions to the accelerator device. The accelerator remoting server transmits accelerator results to an accelerator remoting client to complete the cross platform or platform agnostic accelerator remoting.

公开(公告)号：US11334477B2

公开(公告)日：2022-05-17

申请号：US17070578

申请日：2020-10-14

Applicant: VMware, Inc.

Inventor： Mazhar Memon ,  Zheng Li

IPC: G06F12/02 ,  G06F12/14 ,  G06F21/78 ,  G06F21/12 ,  G06F9/455 ,  G06F9/48 ,  G06F9/4401 ,  G06F9/38 ,  G06F9/30

Abstract: At least one application runs on a hardware platform that includes a plurality of coprocessors, each of which has a respective internal memory space. An intermediate software layer (MVL) is transparent to the application and intercepts calls for coprocessor use. If the data corresponding to an application's call, or separate calls from different entities (including different applications) to the same coprocessor, to the API of a target coprocessor, cannot be stored within the available internal memory space of the target coprocessor, but comprises data subsets that individually can, the MVL intercepts the call response to the application/entities and indicates that the target coprocessor can handle the request. The MVL then transfers the data subsets to the target coprocessor as needed by the corresponding kernel(s) and swaps out each data subset to the internal memory of another coprocessor to make room for subsequently needed data subsets.

公开(公告)号：US11347543B2

公开(公告)日：2022-05-31

申请号：US17063574

申请日：2020-10-05

Applicant: VMware, Inc.

Inventor： Mazhar Memon ,  Miha {hacek over (C)}an{hacek over (c)}ula

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/455 ,  G06F9/50

Abstract: Instructions of at least one application are executed via system software, on a hardware computing system that includes at least one processor and a plurality of coprocessors. At least one application program interface (API) is associated with each coprocessor. A state virtualization layer is installed logically between the application and the system software. The state virtualization layer examines an execution stream directed by the at least one application to a first one of the plurality of coprocessors; extracts the state of the first coprocessor; pauses execution of the first coprocessor; and at runtime, dynamically resumes execution of the execution stream, with the extracted state of the first coprocessor, on a second one of the plurality of coprocessors.

公开(公告)号：US12293198B2

公开(公告)日：2025-05-06

申请号：US17493741

申请日：2021-10-04

Applicant: VMware, Inc.

Inventor： Aidan Cully ,  Vance Miller ,  Dušan Veljko ,  Mazhar Memon

IPC: G06F9/445 ,  G06F9/455 ,  G06F9/50 ,  G06F9/52 ,  G06F9/54

Abstract: A method for executing an application over a plurality of nodes in each of which an application monitor and a runtime are executing includes executing a first portion of the application by first threads of the runtime of the first node and a second portion of the application by second threads of the runtime of the second node, and under control of the application monitors of the first and second nodes and while executing the first portions and second portions of the application, migrating workloads of one or more of the first threads from the first node to the second node for execution by the second threads.

公开(公告)号：US11842223B2

公开(公告)日：2023-12-12

申请号：US17651504

申请日：2022-02-17

Applicant: VMware, Inc.

Inventor： Tiejun Chen ,  Chris Wolf ,  Mazhar Memon ,  Peter Buckingham ,  Shreekanta Das

IPC: G06F9/50 ,  H04L67/289

CPC classification number: G06F9/5077 ,  G06F9/5055 ,  H04L67/289 ,  G06F2209/5011

Abstract: Disclosed herein is the integration into edge nodes of a telecommunications network system of client computer system and server computer system where the server computer system includes a pool of shareable accelerators and the client computer runs an application program that is assisted by the pool of accelerators. The edge nodes connect to user equipment, and some of the user equipment can themselves act as one of the client computer systems. In some embodiments, the accelerators are GPUs, and in other embodiments, the accelerators are artificial intelligence accelerators.

公开(公告)号：US11822925B2

公开(公告)日：2023-11-21

申请号：US17201855

申请日：2021-03-15

Applicant: VMware, Inc.

Inventor： Mazhar Memon ,  Aidan Cully

IPC: G06F9/38 ,  G06N3/02 ,  G06F9/54 ,  G06F9/48

CPC classification number: G06F9/3855 ,  G06F9/3851 ,  G06F9/54 ,  G06N3/02 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/3877 ,  G06F9/4843 ,  G06F9/4881 ,  G06F9/545

Abstract: Execution of multiple execution streams is scheduled on at least one coprocessor. A software layer located logically between applications and the at least one coprocessor intercepts a first API call from an application and determines that a first execution stream is to be executed. Before scheduling the first execution stream, the software layer transmits a response to the application indicating that the at least one coprocessor is ready to execute another execution stream. The software layer intercepts a second API call from the application and determines that a second execution stream including one or more kernels is to be executed. The software layer determines that the one or more kernels does not have a dependency on the first execution stream. The software layer schedules the one or more kernels for execution prior to when the at least one coprocessor has completed execution of the first execution stream.