公开(公告)号：US5841418A

公开(公告)日：1998-11-24

申请号：US483584

申请日：1995-06-07

申请人： Vald Bril ,  Rakesh Bindlish ,  Ken Fuiks ,  Robin Sungsoo Han ,  Sridhar Kotha ,  Alexander Julian Eglit

发明人： Vald Bril ,  Rakesh Bindlish ,  Ken Fuiks ,  Robin Sungsoo Han ,  Sridhar Kotha ,  Alexander Julian Eglit

IPC分类号： G06F3/14 ,  G09G3/20 ,  G09G5/39 ,  G09G5/395 ,  G09G5/00

CPC分类号： G06F3/1431 ,  G09G2360/04 ,  G09G3/2051 ,  G09G5/39 ,  G09G5/395

摘要： A video controller for controlling at least two video displays having independent refresh rates and pixel resolutions. In a first embodiment, two separate data paths are provided within a video controller for each video display (e.g., CRT and LCD). Taking advantage of the increased bandwidth of 64 bit wide DRAMS, data for each data path may be retrieved in separate read cycles. Each datapath may operate at its own clock frequency characteristic of refresh rate and pixel resolution. The dual data path embodiment also reduces the complexity of the software model needed to drive such dual displays. IN an alternative embodiment, a single data path may be provided within a video controller to drive data for two video displays having independent refresh rates and pixel resolutions. A data "tag" (extra bit) is attached to each word or dword passing through the data path indicating the destination (e.g., CRT or LCD) of the video data. At the output of the data path, separate FIFOs (e.g., LCD and CRT) are provided to temporarily store video data. FIFO pointers are fed back to a sequence controller to drive data read cycles from display memory. The use of tags and FIFO pointer feedback allows two video displays to be driven at different data rates, allowing for independent resolution and refresh rates in each display.

公开(公告)号：US6118413A

公开(公告)日：2000-09-12

申请号：US136791

申请日：1998-08-19

申请人： Vlad Bril ,  Rakesh Bindlish ,  Ken Fuiks ,  Robin Sungsoo Han ,  Sridhar Kotha ,  Alexander Julian Eglit

发明人： Vlad Bril ,  Rakesh Bindlish ,  Ken Fuiks ,  Robin Sungsoo Han ,  Sridhar Kotha ,  Alexander Julian Eglit

IPC分类号： G06F3/14 ,  G09G3/20 ,  G09G5/39 ,  G09G5/395 ,  G09G5/00

CPC分类号： G06F3/1431 ,  G09G2360/04 ,  G09G3/2051 ,  G09G5/39 ,  G09G5/395

摘要： A video controller for controlling at least two video displays having independent refresh rates and pixel resolutions. In a first embodiment, two separate data paths are provided within a video controller for each video display (e.g., CRT and LCD). Taking advantage of the increased bandwidth of 64 bit wide DRAMS, data for each data path may be retrieved in separate read cycles. Each datapath may operate at its own clock frequency characteristic of refresh rate and pixel resolution. The dual data path embodiment also reduces the complexity of the software model needed to drive such dual displays. IN an alternative embodiment, a single data path may be provided within a video controller to drive data for two video displays having independent refresh rates and pixel resolutions. A data "tag" (extra bit) is attached to each word or dword passing through the data path indicating the destination (e.g., CRT or LCD) of the video data. At the output of the data path, separate FIFOs (e.g., LCD and CRT) are provided to temporarily store video data. FIFO pointers are fed back to a sequence controller to drive data read cycles from display memory. The use of tags and FIFO pointer feedback allows two video displays to be driven at different data rates, allowing for independent resolution and refresh rates in each display.

摘要翻译： 一种用于控制具有独立的刷新率和像素分辨率的至少两个视频显示器的视频控制器。 在第一实施例中，在每个视频显示器（例如CRT和LCD）的视频控制器内提供两个单独的数据路径。 利用64位宽的DRAMS的带宽增加，可以在单独的读取周期中检索每个数据路径的数据。 每个数据通路可以在其自己的时钟频率下操作刷新率和像素分辨率的特性。 双数据路径实施例还降低了驱动这种双显示器所需的软件模型的复杂性。 在替代实施例中，可以在视频控制器内提供单个数据路径来驱动具有独立刷新率和像素分辨率的两个视频显示器的数据。 附加到通过指示视频数据的目的地（例如，CRT或LCD）的数据路径的每个字或双字的数据“标签”（额外位）。 在数据路径的输出端，提供分离的FIFO（例如LCD和CRT）以临时存储视频数据。 FIFO指针被反馈到序列控制器以从显示存储器驱动数据读取周期。 使用标签和FIFO指针反馈允许以不同的数据速率驱动两个视频显示器，允许在每个显示器中独立分辨率和刷新率。