Flexible flash commands
    4.
    发明授权
    Flexible flash commands 有权
    灵活的Flash命令

    公开(公告)号:US08645618B2

    公开(公告)日:2014-02-04

    申请号:US13332849

    申请日:2011-12-21

    IPC分类号: G06F12/00

    CPC分类号: G06F13/1668

    摘要: A method of controlling a flash media system. The method includes providing a flash lane controller having a processor control mode and creating and presenting soft contexts. The soft contexts generally place the flash lane controller into the processor control mode. In the processor control mode, the flash lane controller stores the entire soft context, finishes executing any outstanding contexts, suspends normal hardware automation, and then executes the soft context.

    摘要翻译: 一种控制闪存介质系统的方法。 该方法包括提供具有处理器控制模式并创建和呈现软上下文的闪存通道控制器。 软上下文通常将闪光灯通道控制器置于处理器控制模式。 在处理器控制模式下,闪存通道控制器存储整个软上下文,完成执行任何未完成的上下文,暂停正常的硬件自动化,然后执行软上下文。

    FLEXIBLE FLASH COMMANDS
    6.
    发明申请
    FLEXIBLE FLASH COMMANDS 有权
    灵活闪存命令

    公开(公告)号:US20130019050A1

    公开(公告)日:2013-01-17

    申请号:US13332849

    申请日:2011-12-21

    IPC分类号: G06F12/00

    CPC分类号: G06F13/1668

    摘要: A method of controlling a flash media system. The method includes providing a flash lane controller having a processor control mode and creating and presenting soft contexts. The soft contexts generally place the flash lane controller into the processor control mode. In the processor control mode, the flash lane controller stores the entire soft context, finishes executing any outstanding contexts, suspends normal hardware automation, and then executes the soft context.

    摘要翻译: 一种控制闪存介质系统的方法。 该方法包括提供具有处理器控制模式并创建和呈现软上下文的闪存通道控制器。 软上下文通常将闪光灯通道控制器置于处理器控制模式。 在处理器控制模式下,闪存通道控制器存储整个软上下文,完成执行任何未完成的上下文,暂停正常的硬件自动化,然后执行软上下文。

    Method, apparatus, and system for preserving cache data of redundant storage controllers
    7.
    发明授权
    Method, apparatus, and system for preserving cache data of redundant storage controllers 有权
    用于保存冗余存储控制器的缓存数据的方法,装置和系统

    公开(公告)号:US07293196B2

    公开(公告)日:2007-11-06

    申请号:US10434489

    申请日:2003-05-07

    IPC分类号: G06F12/16 G06F12/08

    摘要: A method, apparatus, and system for preserving the cache data of redundant storage controllers, by copying the recorded data blocks and the associated cache tags in the primary cache memory of a storage controller to a secondary cache memory of an alternate, redundant storage controller, wherein upon a failure occurring in the primary cache memory of any of the storage controllers, subsequent storage requests from a host, previously intended for processing by the failed storage controller, are processed through the secondary cache memory of a non-failed, redundant storage controller that contains the failed storage's controller cache data and cache tags.

    摘要翻译: 通过将存储控制器的主高速缓冲存储器中记录的数据块和相关联的高速缓存标签复制到备用冗余存储控制器的二次高速缓冲存储器来保存冗余存储控制器的高速缓存数据的方法,装置和系统, 其中当在任何存储控制器的主高速缓冲存储器中发生故障时,先前由故障存储控制器进行处理的来自主机的后续存储请求通过非故障冗余存储控制器的二次高速缓冲存储器来处理 它包含失败的存储的控制器缓存数据和缓存标签。

    Method of mapping logical sectors to physical sectors in a disk drive
sparing partition
    8.
    发明授权
    Method of mapping logical sectors to physical sectors in a disk drive sparing partition 失效
    将逻辑扇区映射到磁盘驱动器备用分区中的物理扇区的方法

    公开(公告)号:US5822142A

    公开(公告)日:1998-10-13

    申请号:US690186

    申请日:1996-07-26

    申请人: Michael S. Hicken

    发明人: Michael S. Hicken

    摘要: A disk drive includes a disk having a plurality of tracks. The disk is formatted so that the tracks are grouped into zones. Each of the tracks within a zone on a particular surface of the disk is written with the same data rate. The disk is formatted with sectors having no sector ID fields. The disk also includes groupings of tracks called sparing partitions. Sparing partitions generally contain less tracks than the number of tracks within a zone. A desired number of spare sectors are placed in each sparing partition and some of the spare sectors are used at manufacture while at least one of the spare sectors in sparing partition is reserved for future use. The disk also includes spare tracks and the disk drive has the capability of identifying bad tracks or defects in the servo areas of a track which make it difficult for the transducer to track follow. Bad tracks are skipped and a spare track is used. Tables, stored redundantly in a reserve area or reserve zone, store the location of all the bad sectors and tracks for converting logical block addresses to physical locations on the disk so that data or information can be found on the disk. The parameters of the zone in which the tables rare kept is optimized to insure that the tables can be read from the disk. The parameters of data zones can also be optimized to the performance capability of the individual head to disk interfaces.

    摘要翻译: 磁盘驱动器包括具有多个轨道的盘。 磁盘被格式化,使得轨道被分组成区域。 磁盘特定表面区域内的每个磁道以相同的数据速率写入。 磁盘使用不带扇区ID字段的扇区进行格式化。 磁盘还包括称为备用分区的轨道分组。 备用分区通常包含比区域内的轨道数少的轨道。 在每个备用扇区中放置期望数量的备用扇区,并且在制造时使用一些备用扇区,而保留分区中的至少一个备用扇区被保留以备将来使用。 磁盘还包括备用磁道,并且磁盘驱动器具有识别轨道的伺服区域中的不良轨迹或缺陷的能力,这使得传感器难以跟踪跟踪。 跳过不良曲目,并使用备用磁道。 存储在备用区域或预留区域中的冗余表存储用于将逻辑块地址转换为磁盘上的物理位置的所有坏扇区和轨道的位置,以便可以在磁盘上找到数据或信息。 优化表稀少保留的区域的参数,以确保可以从磁盘读取表。 数据区域的参数也可以针对单个磁头到磁盘接口的性能优化。

    Interprocessor Communication Architecture
    9.
    发明申请
    Interprocessor Communication Architecture 审中-公开
    处理器间通信架构

    公开(公告)号:US20100287320A1

    公开(公告)日:2010-11-11

    申请号:US12436227

    申请日:2009-05-06

    CPC分类号: G06F9/544

    摘要: Described embodiments provide interprocessor communication between at least two processors of an integrated circuit, each processor running at least one task. For each processor, a proxy task is generated corresponding to each task running on each other processor. A task identifier for each task, and a look-up table having each task identifier associated with each other processor running the task is also generated. When a message is sent from a source task to a destination task that is running on a different processor than the source task, the source task communicates with the proxy task of the destination task. The proxy task appends the task identifier for the destination task to the message and sends the message to an interprocessor communication interface. Based on the task identifier, the processor running the destination task is determined and the destination task retrieves the message.

    摘要翻译: 所描述的实施例提供集成电路的至少两个处理器之间的处理器间通信,每个处理器运行至少一个任务。 对于每个处理器,生成对应于在每个其他处理器上运行的每个任务的代理任务。 还产生每个任务的任务标识符以及具有与运行任务的每个其他处理器相关联的每个任务标识符的查找表。 当从源任务发送消息到与源任务不同的处理器上运行的目标任务时,源任务与目标任务的代理任务进行通信。 代理任务将目标任务的任务标识符附加到消息中,并将消息发送到处理器间通信接口。 基于任务标识符,确定运行目标任务的处理器,并且目的地任务检索该消息。